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19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'04)
Coupling Different Methodologies to Validate Obsolete Microprocessors
Cannes, France
October 10-October 13
ISBN: 0-7695-2241-6
| ASCII Text | x | ||
| L. Anghel, E. Sanchez, M. Sonza Reorda, G. Squillero, R. Velazco, "Coupling Different Methodologies to Validate Obsolete Microprocessors," 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), pp. 250-255, 19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'04), 2004. | |||
| BibTex | x | ||
| @article{ 10.1109/DFT.2004.21, author = {L. Anghel and E. Sanchez and M. Sonza Reorda and G. Squillero and R. Velazco}, title = {Coupling Different Methodologies to Validate Obsolete Microprocessors}, journal ={2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)}, volume = {0}, year = {2004}, issn = {1550-5774}, pages = {250-255}, doi = {http://doi.ieeecomputersociety.org/10.1109/DFT.2004.21}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) TI - Coupling Different Methodologies to Validate Obsolete Microprocessors SN - 1550-5774 SP250 EP255 A1 - L. Anghel, A1 - E. Sanchez, A1 - M. Sonza Reorda, A1 - G. Squillero, A1 - R. Velazco, PY - 2004 KW - null VL - 0 JA - 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) ER - | |||
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DFT.2004.21
The actual operating life time for many electronic systems turned out being much longer than originally foreseen, leading to the use of obsolete components in critical projects. To skip microprocessor obsolescence problems, companies should have bought larger stocks of components when still available, or are forced to find parts in secondary markets later. Alternatively, a suitable low-cost solution could be replacing the obsolete component emulating its functionalities with a programmable logic device. However, design verification of microprocessors is well known as a challenging task. This paper proposes a coupled methodology to generate test-programs, using complementary techniques: one pseudo-exhaustive and one driven by an evolutionary optimizer. As a case study, the Motorola 6800 was targeted.
Citation:
L. Anghel, E. Sanchez, M. Sonza Reorda, G. Squillero, R. Velazco, "Coupling Different Methodologies to Validate Obsolete Microprocessors," dft, pp.250-255, 19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'04), 2004
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