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19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'04)
Reliability and Yield: A Joint Defect-Oriented Approach
Cannes, France
October 10-October 13
ISBN: 0-7695-2241-6
| ASCII Text | x | ||
| Roman Barsky, Israel A. Wagner, "Reliability and Yield: A Joint Defect-Oriented Approach," 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), pp. 2-10, 19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'04), 2004. | |||
| BibTex | x | ||
| @article{ 10.1109/DFT.2004.51, author = {Roman Barsky and Israel A. Wagner}, title = {Reliability and Yield: A Joint Defect-Oriented Approach}, journal ={2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)}, volume = {0}, year = {2004}, issn = {1550-5774}, pages = {2-10}, doi = {http://doi.ieeecomputersociety.org/10.1109/DFT.2004.51}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) TI - Reliability and Yield: A Joint Defect-Oriented Approach SN - 1550-5774 SP2 EP10 A1 - Roman Barsky, A1 - Israel A. Wagner, PY - 2004 KW - null VL - 0 JA - 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) ER - | |||
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DFT.2004.51
We present a model for computing the probability of a parametric failure due to a spot defect. The analysis is based on electromigration in conductors under unidirectional current stress. Analytical solution is given for simple layout and simulations for a more complicated case. Then we show that in some cases electromigration-dependent parametric defects can make a significant contribution to the total yield estimation.
Citation:
Roman Barsky, Israel A. Wagner, "Reliability and Yield: A Joint Defect-Oriented Approach," dft, pp.2-10, 19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'04), 2004
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