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18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'03)
Boston, Massachusetts
November 03-November 05
ISBN: 0-7695-2042-1
Table of Contents
Introduction
Session 1: Yield and Defects
X. Wang, Northeastern University
M. Ottavi, Northeastern University
F. Lombardi, Northeastern University
pp. 3
Tianxu Zhao, Baoji College of Arts and Sciences and Xidian University
Xuchao Duan, Baoji College of Arts and Sciences
Yue Hao, Xidian University
Peijun Ma, Xidian University
pp. 11
D. K. de Vries, Philips Semiconductors Crolles R&D
P. L. C. Simon, Philips Semiconductors Crolles R&D
pp. 26
Session 2: Optoelectronics
Session 3: Fault Analysis, Injection & Simulation
M. Alderighi, Istituto di Astrofisica Spaziale e Fisica Cosmica
F. Casini, Sanitas E.G. S.r.L.
S. D'Angelo, Istituto di Astrofisica Spaziale e Fisica Cosmica
M. Mancini, Istituto di Astrofisica Spaziale e Fisica Cosmica
A. Marmo, Universitá degli Studi di Milano
S. Pastore, Sanitas E.G. S.r.L.
G.R. Sechi, Istituto di Astrofisica Spaziale e Fisica Cosmica
pp. 71
Wangqi Qiu, Texas A&M University
Xiang Lu, Texas A&M University
Zhuo Li, Texas A&M University
D. M. H. Walker, Texas A&M University
Weiping Shi, Texas A&M University
pp. 79
Session 4: Test & Diagnosis
Guido Bertoni, Politecnico di Milano
Luca Breveglieri, Politecnico di Milano
Israel Koren, University of Massachusetts at Amherst
Paolo Maistri, Politecnico di Milano
Vincenzo Piuri, Università di Milano
pp. 105
Session 5: Current Test & Diagnosis
Y. Hariri, ?cole de Technologie Sup?rieure Montreal
C. Thibeault, ?cole de Technologie Sup?rieure Montreal
pp. 117
Session 6: Test Generation & Application
Fengming Zhang, Northeastern University
Y.J. Lee, Northeastern University
T. Kane, LTX Corporation
L. Schiano, Northeastern University
M. Momenzadeh, Northeastern University
Y-B Kim, Northeastern University
F.J. Meyer, Northeastern University
F. Lombardi, Northeastern University
S. Max, LTX Corporation
Phil Perkinson, LTX Corporation
pp. 159
Session 7: Scan Design & Test
Session 8: BIST
C.V. Krishna, University of Texas at Austin
Nur A. Touba, University of Texas at Austin
pp. 217
Gert Jervan, Link?ping University
Petru Eles, Link?ping University
Zebo Peng, Link?ping University
Raimund Ubar, Tallinn Technical University
Maksim Jenihhin, Tallinn Technical University
pp. 225
Session 9: Error Correcting Codes
Whitney J. Townsend, University of Texas at Austin
Jacob A. Abraham, University of Texas at Austin
Earl E. Swartzlander, Jr., University of Texas at Austin
pp. 250
D. Rossi, University of Bologna
S. Cavallotti, University of Bologna
C. Metra, University of Bologna
pp. 257
Invited Talk
Session 10: Analogue & Mixed Signal Test
Session 11: Defect Tolerance and Testing
Arman Vassighi, University of Waterloo
Oleg Semenov, University of Waterloo
Manoj Sachdev, University of Waterloo
Ali Keshavarzi, Intel Corporation
pp. 313
Eiko Sugawara, Japan Aadvanced Institute of Science and Technology
Masaru Fukushi, Japan Aadvanced Institute of Science and Technology
Susumu Horiguchi, Japan Aadvanced Institute of Science and Technology
pp. 328
R. A. Ayoubi, University of Balamand
H. A. Ziade, Lebanese University
M. A. Bayoumi, University of Louisiana
pp. 369
Anders Larsson, Link?pings Universitet
Erik Larsson, Link?pings Universitet
Petru Eles, Link?pings Universitet
Zebo Peng, Link?pings Universitet
pp. 385
N.-J. Park, Oklahoma State University
B. Jin, Oklahoma State University
K.M. George, Oklahoma State University
N. Park, Oklahoma State University
M. Choi, University of Missouri-Rolla
pp. 393
G.C. Cardarilli, University of Rome "Tor Vergata"
M. Ottavi, University of Rome "Tor Vergata"
S. Pontarelli, University of Rome "Tor Vergata"
M. Re, University of Rome "Tor Vergata"
A. Salsano, University of Rome "Tor Vergata"
pp. 401
Dan Zhao, State University of New York at Buffalo
Shambhu Upadhyaya, State University of New York at Buffalo
Martin Margala, University of Rochester
pp. 425
Session 12: FPGA & Memory Test
C. Bolchini, Politecnico di Milano
F. Salice, Politecnico di Milano
D. Sciuto, Politecnico di Milano
R. Zavaglia, Politecnico di Milano
pp. 443
Session 13: Design Verification & Synthesis
L. Anghel, TIMA Laboratory
R. Velazco, TIMA Laboratory
S. Saleh, TIMA Laboratory
S. Deswaertes, TIMA Laboratory
A. El Moucary, TIMA Laboratory
pp. 493
Session 14: SoC & Core Test
Session 15: System Reliability
Session 16: Fault Tolerance
Yung-Yuan Chen, Chung-Hua University
Shi-Jinn Horng, National Taiwan University of Science & Technology
Hung-Chuan Lai, National Taiwan University of Science & Technology
pp. 555
Session 17: Soft Errors
O. Goloubeva, Politecnico di Torino
M. Rebaudengo, Politecnico di Torino
M. Sonza Reorda, Politecnico di Torino
M. Violante, Politecnico di Torino
pp. 581
B. Nicolescu, Ecole Polytechnique de Montr?al
Y. Savaria, Ecole Polytechnique de Montr?al
R. Velazco, TIMA Laboratory
pp. 589
Atul Maheshwari, University of Massachusetts at Amherst
Israel Koren, University of Massachusetts at Amherst
Wayne Burleson, University of Massachusetts at Amherst
pp. 597
Author Index
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pp. 605
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