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1997 Workshop on Defect and Fault-Tolerance in VLSI Systems (DFT '97)
Paris, FRANCE
October 20-October 22
ISBN: 0-8186-8168-3
Table of Contents
Session 1: Critical Area
S. Levasseur, Central R&D, SGS-Thomson Microelectron., Crolles, France
F. Duvivier, Central R&D, SGS-Thomson Microelectron., Crolles, France
pp. 11
G.A. Allan, Dept. of Electr. Eng., Edinburgh Univ., UK
A.J. Walton, Dept. of Electr. Eng., Edinburgh Univ., UK
pp. 20
Zhan Chen, University of Massachusetts, Amherst
Israel Koren, University of Massachusetts, Amherst
pp. 38
Session 2: Yield Management
A. Gandhi, KLA-Tencor, Milpitas, CA, USA
S. Hall, KLA-Tencor, Milpitas, CA, USA
R. Harris, KLA-Tencor, Milpitas, CA, USA
pp. 53
Witold A. Pleskacz, Warsaw University of Technology
Wojciech Maly, Carnegie Mellon University
Hans T. Heineken, Level One Communications
pp. 62
Session 3: Test and Test Generation
D.G. Ashen, Intel Corp., Santa Clara, CA, USA
F.J. Meyer, Intel Corp., Santa Clara, CA, USA
N. Park, Intel Corp., Santa Clara, CA, USA
F. Lombardi, Intel Corp., Santa Clara, CA, USA
pp. 76
F. Ferrandi, Politecnico di Milano
F. Fummi, Politecnico di Milano
L. Pozzi, Politecnico di Milano
M.G. Sami, Politecnico di Milano
pp. 85
C. Aktouf, LCIS-ESISAR, Valence, France
G. Al-Hayek, LCIS-ESISAR, Valence, France
C. Robach, LCIS-ESISAR, Valence, France
pp. 94
Panel Session
Techniques for Yield Management
Session 4: Self Checking and Coding
Yu-Yau Guo, Dept. of Electr. & Comput. Eng., Rhode Island Univ., Kingston, RI, USA
Jien-Chung Lo, Dept. of Electr. & Comput. Eng., Rhode Island Univ., Kingston, RI, USA
C. Metra, Dept. of Electr. & Comput. Eng., Rhode Island Univ., Kingston, RI, USA
pp. 110
C. Metra, Dipt. di Elettronica, Inf. e Sistemistica, Bologna Univ., Italy
M. Favalli, Dipt. di Elettronica, Inf. e Sistemistica, Bologna Univ., Italy
B. Ricco, Dipt. di Elettronica, Inf. e Sistemistica, Bologna Univ., Italy
pp. 137
Session 5: Cost Modeling
Michel Kafrouni, ?cole de Technologie Sup?rieure
Claude Thibeault, ?cole de Technologie Sup?rieure
pp. 148
Y. Gagnon, Dept. de Genie Phys., Ecole Polytech. de Montreal, Que., Canada
Y. Savaria, Dept. de Genie Phys., Ecole Polytech. de Montreal, Que., Canada
M. Meunier, Dept. de Genie Phys., Ecole Polytech. de Montreal, Que., Canada
C. Thibeault, Dept. de Genie Phys., Ecole Polytech. de Montreal, Que., Canada
pp. 157
J.R. Samson, Jr., Space & Strategic Syst. Operation, Honeywell Inc., USA
W. Moreno, Space & Strategic Syst. Operation, Honeywell Inc., USA
F. Falquez, Space & Strategic Syst. Operation, Honeywell Inc., USA
pp. 175
Session 6: Fault Tolerance
Wei Liang Huang, Dept. of Electron. Eng., Fudan Univ., Shanghai, China
F.J. Meyer, Dept. of Electron. Eng., Fudan Univ., Shanghai, China
F. Lombardi, Dept. of Electron. Eng., Fudan Univ., Shanghai, China
pp. 186
X. Wendling, Institut National Polytechnique de Grenoble / CSI
H. Chauvet, Institut National Polytechnique de Grenoble / CSI
L. Reveret, Institut National Polytechnique de Grenoble / CSI
R. Rochet, Institut National Polytechnique de Grenoble / CSI
R. Leveugle, Institut National Polytechnique de Grenoble / CSI
pp. 195
C. Bolchini, Politecnico di Milano
G. Buonanno, Politecnico di Milano
M. Cozzini, Politecnico di Milano
D. Sciuto, Politecnico di Milano
R. Stefanelli, Politecnico di Milano
pp. 204
A. Benso, Politecnico di Torino
P. Prinetto, Politecnico di Torino
M. Rebaudengo, Politecnico di Torino
M. Sonza Reorda, Politecnico di Torino
J. Raik, Tallinn Technical University
R. Ubar, Tallinn Technical University
pp. 212
Session 7: Fault Tolerance II
I. Takanami, Dept. of Comput. Sci., Iwate Univ., Morioka, Japan
T. Horita, Dept. of Comput. Sci., Iwate Univ., Morioka, Japan
pp. 218
Session 8: Error Recovery
M. Favalli, Dipt. di Elettronica, Inf. e Sistemistica, Bologna Univ., Italy
C. Metra, Dipt. di Elettronica, Inf. e Sistemistica, Bologna Univ., Italy
pp. 234
F. Distante, Informazione Politecnico di Milano
M. G. Sami, Informazione Politecnico di Milano
R. Stefanelli, Informazione Politecnico di Milano
pp. 261
Session 9: Error Detection
A. Walker, Dept. of Electr. Eng., North Carolina A&T State Univ., Greensboro, NC, USA
A.P. Henry, Dept. of Electr. Eng., North Carolina A&T State Univ., Greensboro, NC, USA
P.K. Lala, Dept. of Electr. Eng., North Carolina A&T State Univ., Greensboro, NC, USA
pp. 272
Anna Antola, Politecnico di Milano
Vincenzo Piuri, Politecnico di Milano
Mariagiovanna Sami, Politecnico di Milano
pp. 298
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