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Christchurch, New Zealand
Jan. 29, 2002 to Jan. 31, 2002
ISBN: 0-7695-1453-7
pp: 297
P. Faure , LIRMM - UM2
P. Prinetto , Polytecnico de Torino
M. Renovell , LIRMM - UM2
ABSTRACT
This paper proposes a new and original solution to test the uni-dimensionnal interconnect architecture of a RAM based FPGA by exploring the specific properties of these blocks. The method to find a reduced set of configurations is proposed and the sequence of test vectors required for each configuration is given.
INDEX TERMS
FPGA, Test
CITATION
P. Faure, P. Prinetto, M. Renovell, "Testing the Unidimensional Interconnect Architecture of Symmetrical SRAM-Based FPGA", DELTA, 2002, Proceedings First IEEE International Workshop on Electronic Design, Test and Applications '2002, Proceedings First IEEE International Workshop on Electronic Design, Test and Applications '2002 2002, pp. 297, doi:10.1109/DELTA.2002.994634
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