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The First IEEE International Workshop on Electronic Design, Test and Applications (DELTA '02)
GALA Approach in Design of Asynchronous Control for Counterflow Pipeline Processor
Christchurch, New Zealand
January 29-January 31
ISBN: 0-7695-1453-7
Victor Varshavsky, Neural Networks Technologies Ltd.
Vyacheslav Marakhovsky, The University of Aizu
This paper approaches the problem of building an asynchronous control for a stage of the Sproull's Counterflow Pipeline Processor (CFPP) that does not need arbiters. It is shown that there is no arbitration situations in a synchronous pipeline control circuit with two-track synchronization. An asynchronous control circuit can be built by a synchronous prototype with help of GALA-methodology using the procedure of synchro-stratum designing we suggested earlier.
Index Terms:
Asynchronous Design, GALA - Globally Asynchronous Locally Arbitrary, Counterflow Pipeline Processor, Arbitration, Synchronous Prototype
Citation:
Victor Varshavsky, Vyacheslav Marakhovsky, "GALA Approach in Design of Asynchronous Control for Counterflow Pipeline Processor," delta, pp.73, The First IEEE International Workshop on Electronic Design, Test and Applications (DELTA '02), 2002
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