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13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems
Reconfigurable hardware objects for image processing on FPGAs
Vienna, Austria
April 14-April 16
ISBN: 978-1-4244-6612-2
Jan Kloub, Institute of Information Theory and Automation of ASCR, Pod Vodárenskou vezí 4, 182 08 Praha 8, Czech Republic
Petr Honzik, Institute of Information Theory and Automation of ASCR, Pod Vodárenskou vezí 4, 182 08 Praha 8, Czech Republic
Martin Danek, Institute of Information Theory and Automation of ASCR, Pod Vodárenskou vezí 4, 182 08 Praha 8, Czech Republic
Embedded systems are getting more complex; that is why the high level of abstraction is required during the development process. High abstraction methods simplify implementation of complex computation systems and shorten the time to market. This paper presents an implementation of a graphic computing element (GCE) which can be used as a runtime parametrized building block in image processing applications in FPGAs. In terms of the object oriented model GCE encapsulates its internal data representation and rules for their manipulation. Several basic image processing operations have been implemented (Sobel edge detection, Gauss, mean, etc. filtering). These operations are called as GCE methods. Because of high spatial dependency of image data in image processing, an efficient image data reuse method has been implemented.
Citation:
Jan Kloub, Petr Honzik, Martin Danek, "Reconfigurable hardware objects for image processing on FPGAs," ddecs, pp.121-122, 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010
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