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Defect Based Testing, IEEE International Workshop on (2000)
Montreal, Canada
Apr. 30, 2000 to Apr. 30, 2000
ISBN: 0-7695-0637-2
TABLE OF CONTENTS
Reviewers (PDF)
pp. ix
Session 1: Deep Sub-Micron I<sub>DDQ</sub> Testing
Ali Keshavarzi , Intel Corporation
Vivek De , Intel Corporation
pp. 3
Y. Moisiadis , Uniersity of Athens, Athens, Greece
Th. Haniotakis , Uniersity of Athens, Athens, Greece; University of Patras, Greece
D. Nikolos , University of Patras, Greece
A. Arapoyanni , Uniersity of Athens, Athens, Greece
pp. 9
Session 2: Defect Oriented Testing
J. Khare , Level One Communications,Sacramento, CA
pp. 23
A. Rao , PalmChip Corporation, Loveland, CO
A. P. Jayasumana , Colorado State University, Fort Collins
Y. K. Malaiya , Colorado State University, Fort Collins
pp. 30
Session 3: Current Measurement And Yield
Patricia A. Smith , Sandia National Laboratories, Albuquerque, NM
David V. Campbell , Sandia National Laboratories, Albuquerque, NM
pp. 51
I. de Pa? , Balearic Islands University, Spain
J. Segura , Balearic Islands University, Spain
C. F. Hawkins , The University of New Mexico and Sandia National Labs.
J. Soden , Sandia National Labs.
pp. 57
Session 4: Current and Voltage Test Techniques
Masaki Hashizume , The Univ. of Tokushima, Japan
Hiroshi Hoshika , The Univ. of Tokushima, Japan
Hiroyuki Yotsuyanagi , The Univ. of Tokushima, Japan
Takeomi Tamesada , The Univ. of Tokushima, Japan
pp. 70
Cecilia Metra , D.E.I.S. University of Bologna, Italy
Michele Favalli , D.I. University of Ferrara, Italy
Bruno Ricc? , D.E.I.S. University of Bologna, Italy
pp. 76
Author Index (PDF)
pp. 82
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