This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Design, Automation and Test in Europe Conference and Exhibition Volume I (DATE'04)
Paris, France
February 16-February 20
ISBN: 0-7695-2085-5
A.M. Molnos, Delft University of Technology and Philips Research Laboratories
M.J.M. Heijligers, Philips Research Laboratories
S.D. Cotofana, Delft University of Technology
J.T.J. van Eijndhoven, Philips Research Laboratories
To alleviate the system performance unpredictability of multitasking applications running on multiprocessor platforms with shared memory hierarchies we propose a task level set based cache partitioning. We evaluate our approach on a CAKE platformwith three Trimedias, one MIPS and a shared level 2 cache using a picture in picture benchmark. We compare the performance implications of two types of cache partitioning namely set based. Our experiments indicates that associativity based cache partitioning induces at least 30% performance degradation, whereas set-based partitioning provide 27% performance improvement when compared to non-partitioned cache scenario.
Citation:
A.M. Molnos, M.J.M. Heijligers, S.D. Cotofana, J.T.J. van Eijndhoven, "Compositional Memory Systems for Data Intensive Applications," date, vol. 1, pp.10728, Design, Automation and Test in Europe Conference and Exhibition Volume I (DATE'04), 2004
Usage of this product signifies your acceptance of the Terms of Use.