A Tool for Automatic Generation of RTL-Level VHDL Description of RNS FIR Filters

D
DATE
2004
Design, Automation and Test in Europe Conference and Exhibition Volume I (DATE'04)
Abstract - A Tool for Automatic Generation of RTL-Level VHDL Description of RNS FIR Filters

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Design, Automation and Test in Europe Conference and Exhibition Volume I (DATE'04)

A Tool for Automatic Generation of RTL-Level VHDL Description of RNS FIR Filters (PDF)

Paris, France

February 16-February 20

ISBN: 0-7695-2085-5

	ASCII Text	x
	A. Del Re, A. Nannarelli, M. Re, "A Tool for Automatic Generation of RTL-Level VHDL Description of RNS FIR Filters," Design, Automation and Test in Europe Conference and Exhibition, vol. 1, pp. 10686, Design, Automation and Test in Europe Conference and Exhibition Volume I (DATE'04), 2004.

	BibTex	x
	@article{ 10.1109/DATE.2004.1268931, author = {A. Del Re and A. Nannarelli and M. Re}, title = {A Tool for Automatic Generation of RTL-Level VHDL Description of RNS FIR Filters}, journal ={Design, Automation and Test in Europe Conference and Exhibition}, volume = {1}, year = {2004}, issn = {1530-1591}, pages = {10686}, doi = {http://doi.ieeecomputersociety.org/10.1109/DATE.2004.1268931}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Design, Automation and Test in Europe Conference and Exhibition TI - A Tool for Automatic Generation of RTL-Level VHDL Description of RNS FIR Filters SN - 1530-1591 SP EP A1 - A. Del Re, A1 - A. Nannarelli, A1 - M. Re, PY - 2004 KW - null VL - 1 JA - Design, Automation and Test in Europe Conference and Exhibition ER -

A. Del Re, University of Rome "Tor Vergata"

A. Nannarelli, Technical University, Denmark

M. Re, University of Rome "Tor Vergata"

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DATE.2004.1268931

Although digital filters based on the Residue Number System (RNS) show high performance and low power dissipation, RNS filters are not widely used in DSP systems, because of the complexity of the algorithms involved. We present a tool to design RNS FIR filters which hides the RNS algorithms to the designer, and generates a synthesizable VHDL description of the filter taking into account several design constraints such as: delay, area and energy.

Citation:

A. Del Re, A. Nannarelli, M. Re, "A Tool for Automatic Generation of RTL-Level VHDL Description of RNS FIR Filters," date, vol. 1, pp.10686, Design, Automation and Test in Europe Conference and Exhibition Volume I (DATE'04), 2004

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