This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Design, Automation and Test in Europe Conference and Exhibition Volume I (DATE'04)
SystemC and SystemVerilog: Where do They Fit? Where are They Going?
Paris, France
February 16-February 20
ISBN: 0-7695-2085-5
ASCII Text
x 
 
Donatella Sciuto, Grant Martin, Wolfgang Rosenstiel, Stuart Swan, Frank Ghenassia, Peter Flake, Johny Srouji, "SystemC and SystemVerilog: Where do They Fit? Where are They Going?," Design, Automation & Test in Europe Conference & Exhibition, vol. 1, pp. 10122, Design, Automation and Test in Europe Conference and Exhibition Volume I (DATE'04), 2004.
 
 
BibTex
x
 
@article{ 10.1109/DATE.2004.1268837,
author = {Donatella Sciuto and Grant Martin and Wolfgang Rosenstiel and Stuart Swan and Frank Ghenassia and Peter Flake and Johny Srouji},
title = {SystemC and SystemVerilog: Where do They Fit? Where are They Going?},
journal ={Design, Automation & Test in Europe Conference & Exhibition},
volume = {1},
year = {2004},
issn = {1530-1591},
pages = {10122},
doi = {http://doi.ieeecomputersociety.org/10.1109/DATE.2004.1268837},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Design, Automation & Test in Europe Conference & Exhibition
TI - SystemC and SystemVerilog: Where do They Fit? Where are They Going?
SN - 1530-1591
SP
EP
A1 - Donatella Sciuto,
A1 - Grant Martin,
A1 - Wolfgang Rosenstiel,
A1 - Stuart Swan,
A1 - Frank Ghenassia,
A1 - Peter Flake,
A1 - Johny Srouji,
PY - 2004
KW - null
VL - 1
JA - Design, Automation & Test in Europe Conference & Exhibition
ER -
 
Donatella Sciuto, Politecnico di Milano
Grant Martin, Cadence Berkeley Labs
Wolfgang Rosenstiel, University of T?bingen
Stuart Swan, Cadence Design Systems
Frank Ghenassia, ST Microelectronics
Peter Flake, Synopsys
Johny Srouji, Intel
There is tremendous interest in design languages these days - and more particularly, SystemC and SystemVerilog. Sometimes the truth about design languages can be obscured by marketing and the press. This panel is meant to deepen the technical understanding of the DATE audience on the issue of design languages. It contains five technical experts - an academic expert in design languages and SystemC and SystemVerilog in particular; a language expert for each of SystemC and SystemVerilog; and a user expert for these two languages. The language experts have been heavily involved in the specification and evolution of their respective languages. The user experts have been heavily involved in developing use methodologies for these languages within their own design communities, and in applying them to real design problems. The panelists will consider the questions:
  • what are the key capabilities of these languages and what do they offer to users?
  • which design problems are they best used for? what is their scope?
  • how has application of these languages to real design problems improved the productivity of designers and the quality of the design results?
  • where should the languages develop further capabilities?
    • Citation:
    Donatella Sciuto, Grant Martin, Wolfgang Rosenstiel, Stuart Swan, Frank Ghenassia, Peter Flake, Johny Srouji, "SystemC and SystemVerilog: Where do They Fit? Where are They Going?," date, vol. 1, pp.10122, Design, Automation and Test in Europe Conference and Exhibition Volume I (DATE'04), 2004
    Usage of this product signifies your acceptance of the Terms of Use.