|
| This Article | ||
| ||
| Share | ||
| Bibliographic References | ||
| Add to: | ||
| | ||
| Search | ||
| ||
Design Automation and Test in Europe (DATE '98)
Hierarchical Characterization of Analog Integrated CMOS Circuits
Paris, France
February 23-February 26
ISBN: 0-8186-8359-7
| ASCII Text | x | ||
| Josef Eckmueller, Martin Groepl, Helmut E. Graeb, "Hierarchical Characterization of Analog Integrated CMOS Circuits," Design, Automation & Test in Europe Conference & Exhibition, pp. 636, Design Automation and Test in Europe (DATE '98), 1998. | |||
| BibTex | x | ||
| @article{ 10.1109/DATE.1998.655925, author = {Josef Eckmueller and Martin Groepl and Helmut E. Graeb}, title = {Hierarchical Characterization of Analog Integrated CMOS Circuits}, journal ={Design, Automation & Test in Europe Conference & Exhibition}, volume = {0}, year = {1998}, isbn = {0-8186-8359-7}, pages = {636}, doi = {http://doi.ieeecomputersociety.org/10.1109/DATE.1998.655925}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - Design, Automation & Test in Europe Conference & Exhibition TI - Hierarchical Characterization of Analog Integrated CMOS Circuits SN - 0-8186-8359-7 SP EP A1 - Josef Eckmueller, A1 - Martin Groepl, A1 - Helmut E. Graeb, PY - 1998 KW - hierarchical characterization - functional constraints - circuit performances - circuit class - topology independent - transistor pairs VL - 0 JA - Design, Automation & Test in Europe Conference & Exhibition ER - | |||
This paper presents a new method for hierarchical characterization of analog integrated circuits. For each circuit class, a fundamental set of performances is defined and extracted topology independently. A circuit being characterized is decomposed in general subcircuits. Sizing rules of these topology independent subcircuits are included into the characterization by functional constraints. In this way, bad circuit sizing is detected and located.
Index Terms:
hierarchical characterization - functional constraints - circuit performances - circuit class - topology independent - transistor pairs
Citation:
Josef Eckmueller, Martin Groepl, Helmut E. Graeb, "Hierarchical Characterization of Analog Integrated CMOS Circuits," date, pp.636, Design Automation and Test in Europe (DATE '98), 1998
Usage of this product signifies your acceptance of the Terms of Use.
