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Design Automation Conference (2004)
San Diego, California, USA
June 7, 2004 to June 11, 2004
ISBN: 1-58113-828-8
TABLE OF CONTENTS
Panel: CEO PANEL: EDA: This is Serious Business
Special Session: HOT Leakage
Arman Vassighi , Circuits Research
Ali Keshavarzi , Circuits Research
Siva Narendra , Circuits Research
Gerhard Schrom , Circuits Research
Yibin Ye , Circuits Research
Seri Lee , Platform Technology
Greg Chrysler , Advanced Technology, Intel Labs
Manoj Sachdev , University of Waterloo, Canada
Vivek De , Circuits Research
pp. 2-5
Amit Agarwal , Purdue University, West Lafayette, IN
Chris H. Kim , Purdue University, West Lafayette, IN
Saibal Mukhopadhyay , Purdue University, West Lafayette, IN
Kaushik Roy , Purdue University, West Lafayette, IN
pp. 6-11
Lei He , University of California, Los Angeles
Weiping Liao , University of California, Los Angeles
Mircea R. Stan , University of Virginia, Charlottesville
pp. 12-17
Clock Routing and Buffering
Anand Rajaram , Texas A&M University, College Station, TX
Jiang Hu , Texas A&M University, College Station, TX
Rabi Mahapatra , Texas A&M University, College Station, TX
pp. 18-23
Charles J. Alpert , IBM Corp., Austin, Texas
Milos Hrkic , University of Illinois at Chicago
Jiang Hu , Texas A&M University
Stephen T. Quay , IBM Corp., Austin, Texas
pp. 24-29
Xun Liu , North Carolina State University, Raleigh
Yuantao Peng , North Carolina State University, Raleigh
Marios C. Papaefthymiou , University of Michigan, Ann Arbor
pp. 30-35
Tools and Strategies for Dynamic Verification
Michael Behm , IBM Development Center, Austin, Texas
John Ludden , IBM Development Center, Austin, Texas
Yossi Lichtenstein , IBM Research Laboratory, Haifa, Israel
Michal Rimon , IBM Research Laboratory, Haifa, Israel
Michael Vinov , IBM Research Laboratory, Haifa, Israel
pp. 36-40
Sigal Asaf , IBM Research Laboratory in Haifa, Israel
Eitan Marcus , IBM Research Laboratory in Haifa, Israel
Avi Ziv , IBM Research Laboratory in Haifa, Israel
pp. 41-44
Shai Fine , IBM Research Laboratory in Haifa
Shmuel Ur , IBM Research Laboratory in Haifa
Avi Ziv , IBM Research Laboratory in Haifa
pp. 49-54
Timing-Driven System Synthesis
Daniel L. Rosenband , Massachusetts Institute of Technology, Cambridge, MA
Arvind , Massachusetts Institute of Technology, Cambridge, MA
pp. 55-60
Kai Kapp , University of Karlsruhe, Germany
Viktor Sabelfeld , University of Karlsruhe, Germany
pp. 61-66
Fan Mo , University of California, Berkeley
Robert K. Brayton , University of California, Berkeley
pp. 67-70
Anders Edman , Link?ping University, Sweden
Christer Svensson , Link?ping University, Sweden
pp. 71-74
Special Session: Reliable System-on-a-Chip Design in the Nanometer Era
Shekhar Borkar , Circuit Research, Intel Labs, Hillsboro, OR
Tanay Karnik , Circuit Research, Intel Labs, Hillsboro, OR
Vivek De , Circuit Research, Intel Labs, Hillsboro, OR
pp. 75
Naresh R. Shanbhag , University of Illinois at Urbana-Champaign
pp. 76
Todd M. Austin , University of Michigan
pp. 78
Ravishankar K. Iyer , University of Illinois at Urbana-Champaign
pp. 79
Panel: When IC Yield Missed the Target, Who is at Fault?
Power Modeling and Optimization for Embedded Systems
Chun-Gi Lyuh , Electronics and Telecommunications Research Institute, Daejeon, Korea
Taewhan Kim , Seoul National University, Korea
pp. 81-86
Jaewon Seo , CS, KAIST
Taewhan Kim , EE, Seoul National Univ.
Ki-Seok Chung , CIC, Hanyang University
pp. 87-92
Juan Antonio Carballo , IBM Austin Research Laboratory, Austin, TX
Kevin Nowka , IBM Austin Research Laboratory, Austin, TX
Seung-Moon Yoo , IBM Austin Research Laboratory, Austin, TX
Ivan Vo , IBM Austin Research Laboratory, Austin, TX
Clay Cranford , IBM Systems and Technology, Raleigh, NC
Robert Norman , IBM Systems and Technology, Raleigh, NC
pp. 93-98
Anish Muttreja , Princeton University, NJ
Anand Raghunathan , NEC Labs, Princeton, NJ
Srivaths Ravi , NEC Labs, Princeton, NJ
Niraj K. Jha , Princeton University, NJ
pp. 99-102
Srinivasa R. Sridhara , University of Illinois at Urbana-Champaign
Naresh R. Shanbhag , University of Illinois at Urbana-Champaign
pp. 103-106
Performance Evaluation and Run Time Support
Tobias Schuele , University of Kaiserslautern, Germany
Klaus Schneider , University of Kaiserslautern, Germany
pp. 107-112
Sudeep Pasricha , University of California, Irvine, CA
Nikil Dutt , University of California, Irvine, CA
Mohamed Ben-Romdhane , Conexant Systems Inc., Newport Beach, CA
pp. 113-118
Javier Resano , Universidad Complutense de Madrid, Spain
Daniel Mozos , Universidad Complutense de Madrid, Spain
Diederik Verkest , IMEC vzw, Leuven, Belgium IMEC
Francky Catthoor , IMEC vzw, Leuven, Belgium IMEC
Serge Vernalde , IMEC vzw, Leuven, Belgium IMEC
pp. 119-124
Mahmut Kandemir , The Pennsylvania State University, University Park, PA
pp. 125-128
Carlo Brandolese , Politecnico di Milano - DEI, Italy
William Fornaciari , Politecnico di Milano - DEI, Italy
Fabio Salice , Politecnico di Milano - DEI, Italy
pp. 129-132
Advances in Analog Circuit and Layout Synthesis
Johan P. Vanderhaegen , University of California at Berkeley
Robert W. Brodersen , University of California at Berkeley
pp. 133-138
Sambuddha Bhattacharya , University of Washington, Seatlle
Nuttorn Jangkrajarng , University of Washington, Seatlle
Roy Hartono , University of Washington, Seatlle
C-J. Richard Shi , University of Washington, Seatlle
pp. 139-144
Anuradha Agarwal , University of Cincinnati, OH
Hemanth Sampath , University of Cincinnati, OH
Veena Yelamanchili , University of Cincinnati, OH
Ranga Vemuri , University of Cincinnati, OH
pp. 145-150
Yang Xu , Carnegie Mellon University, Pittsburgh, PA
Lawrence T. Pileggi , Carnegie Mellon University, Pittsburgh, PA
Stephen P. Boyd , Stanford University, CA
pp. 151-154
Gang Zhang , Carnegie Mellon University, Pittsbugh, PA
Aykut Dengi , Neolinear Inc., Pittsburgh, PA
Ronald A. Rohrer , Neolinear Inc., Pittsburgh, PA
Rob A. Rutenbar , Carnegie Mellon University, Pittsbugh, PA
L. Richard Carley , Carnegie Mellon University, Pittsbugh, PA
pp. 155-158
Power Grid Design and Analysis Techniques
Kai Wang , University of California, Santa Barbara
Malgorzata Marek-Sadowska , University of California, Santa Barbara
pp. 159-164
Min Zhao , Motorola, Inc., Austin, TX
Yuhong Fu , Motorola, Inc., Austin, TX
Vladimir Zolotov , Motorola, Inc., Austin, TX
Savithri Sundareswaran , Motorola, Inc., Austin, TX
Rajendran Panda , Motorola, Inc., Austin, TX
pp. 165-170
Sanjay Pant , University of Michigan, Ann Arbor, MI
David Blaauw , University of Michigan, Ann Arbor, MI
Vladimir Zolotov , Motorola Inc., Austin, Texas
Savithri Sundareswaran , Motorola Inc., Austin, Texas
Rajendran Panda , Motorola Inc., Austin, Texas
pp. 171-176
Su-Wei Wu , Elan Microelectronics Corporation, Hsinchu, Taiwan
Yao-Wen Chang , National Taiwan University, Taipei, Taiwan
pp. 177-180
G?ran Jerke , Automotive Electronics Division AE/DIC, Germany
Jens Lienig , Dresden Univ. of Technology, Germany
J? Scheible , Automotive Electronics Division AE/DIC, Germany
pp. 181-184
Panel: What Happened to ASIC? Go (Recon)figure?
Methods for a Priori Feasible Layout Generation
Li-Da Huang , University of Texas at Austin
Martin D. F. Wong , University of Illinois at Urbana-Champaign
pp. 186-191
Narendra V. Shenoy , Advanced Technology Group, Synopsys Inc., Mountain View, CA
Jamil Kawa , Advanced Technology Group, Synopsys Inc., Mountain View, CA
Raul Camposano , Advanced Technology Group, Synopsys Inc., Mountain View, CA
pp. 192-197
Yajun Ran , University of California, Santa Barbara
Malgorzata Marek-Sadowska , University of California, Santa Barbara
pp. 198-203
V. Kheterpal , Carnegie Mellon University, Pittsburgh, PA
A. J. Strojwas , Carnegie Mellon University, Pittsburgh, PA
L. Pileggi , Carnegie Mellon University, Pittsburgh, PA
pp. 204-207
Hiroaki Yoshida , Zenasis Technologies, Inc., Campbell, CA
Kaushik De , Zenasis Technologies, Inc., Campbell, CA
Vamsi Boppana , Zenasis Technologies, Inc., Campbell, CA
pp. 208-211
Abstraction Techniques for Functional Verification
G. Parthasarathy , University of California, Santa Barbara
M. K. Iyer , University of California, Santa Barbara
K.-T. Cheng , University of California, Santa Barbara
Li-C. Wang , University of California, Santa Barbara
pp. 212-217
Zaher S. Andraus , University of Michigan, Ann Arbor
Karem A. Sakallah , University of Michigan, Ann Arbor
pp. 218-223
Freddy Y. C. Mang , Advanced Technology Group, Synopsys, Inc.
Pei-Hsin Ho , Advanced Technology Group, Synopsys, Inc.
pp. 224-229
Yuan Lu , Broadcom Corporation
Mike Jorda , Broadcom Corporation
pp. 230-233
Hazem I. Shehata , University of Waterloo, Canada
Mark D. Aagaard , University of Waterloo, Canada
pp. 234-237
Memory and Network Optimization in Embedded Designs
Poletti Francesco , University of Bologna, Italy
Paul Marchal , IMEC vzw, Belgium
David Atienza , DACYA/UCM, Spain
Luca Benini , University of Bologna, Italy
Francky Catthoor , IMEC vzw, Belgium
Jose M. Mendias , DACYA/UCM, Spain
pp. 238-243
E. Wanderley Netto , CEFET/RN IC/UNICAMP
R. Azevedo , IC/UNICAMP
P. Centoducatte , IC/UNICAMP
G. Araujo , IC/UNICAMP
pp. 244-249
Sang-Il Han , Seoul National Univ., Seoul, Korea; TIMA Laboratory, Grenoble, France
Amer Baghdadi , ENST Bretagne, Brest, France
Marius Bonaciu , TIMA Laboratory, Grenoble, France
Soo-Ik Chae , Seoul National Univ., Seoul, Korea
Ahmed A. Jerraya , TIMA Laboratory, Grenoble, France
pp. 250-255
Vincent Nollet , IMEC vzw., Belgium
Th?odore Marescaux , IMEC vzw., Belgium
Diederik Verkest , IMEC vzw., Belgium
pp. 256-259
Jingcao Hu , Carnegie Mellon University, Pittsburgh, PA
Radu Marculescu , Carnegie Mellon University, Pittsburgh, PA
pp. 260-263
Special Session: The Future of Timing Closure
David S. Kung , IBM T. J. Watson Research Center, Yorktown Heights, NY
pp. 265-266
Paul Rodman , CTO, ReShape, Inc.
pp. 267
Miodrag Vujkovic , University of Washington, Seattle
David Wadkins , University of Washington, Seattle
Bill Swartz , InternetCAD.com, Inc., Dallas, TX
Carl Sechen , University of Washington, Seattle
pp. 268-273
Panel: Verification, What Works and What Doesn't
Design Space Exploration and Scheduling for Embedded Software
Ravindra Jejurikar , University of California at Irvine
Cristiano Pereira , University of California at San Diego
Rajesh Gupta , University of California at San Diego
pp. 275-280
Lukai Cai , University of California, Irvine
Andreas Gerstlauer , University of California, Irvine
Daniel Gajski , University of California, Irvine
pp. 281-286
Joshua J. Pieper , Carnegie Mellon University
Alain Mellan , STMicroelectronics
JoAnn M. Paul , Carnegie Mellon University
Donald E. Thomas , Carnegie Mellon University
Faraydon Karim , STMicroelectronics
pp. 287-292
Advances in Accelerated Simulation
Young-Il Kim , Korea Advanced Institute of Science and Technology
Wooseung Yang , Korea Advanced Institute of Science and Technology
Young-Su Kwon , Korea Advanced Institute of Science and Technology
Chong-Min Kyung , Korea Advanced Institute of Science and Technology
pp. 293-298
Seokwoo Lee , The University of Michigan, Ann Arbor
Shidhartha Das , The University of Michigan, Ann Arbor
Valeria Bertacco , The University of Michigan, Ann Arbor
Todd Austin , The University of Michigan, Ann Arbor
David Blaauw , The University of Michigan, Ann Arbor
Trevor Mudge , The University of Michigan, Ann Arbor
pp. 305-310
Design for Manufacturability
L. Capodieci , Advanced Micro Devices, Sunnyvale, California
P. Gupta , University of California at San Diego
A. B. Kahng , University of California at San Diego
D. Sylvester , University of Michigan at Ann Arbor
J. Yang , University of Michigan at Ann Arbor
pp. 311-316
Kevin McCullen , IBM Microelectronics Division, Essex Junction, VT
pp. 317-320
Puneet Gupta , UC San Diego, CA
Fook-Luen Heng , IBM T.J. Watson Research Center, Yorktown Heights, NY
pp. 321-326
Puneet Gupta , University of California at San Diego
Andrew B. Kahng , University of California at San Diego
Puneet Sharma , University of California at San Diego
Dennis Sylvester , University of Michigan, Ann Arbor
pp. 327-330
Statistical Timing Analysis
C. Visweswariah , IBM Research T. J. Watson Research Center, Yorktown Heights, NY
K. Ravindran , University of California, Berkeley, CA
K. Kalafala , IBM Microelectronics, East Fishkill, NY and Burlington, VT
S. G. Walker , IBM Research T. J. Watson Research Center, Yorktown Heights, NY
S. Narayan , IBM Microelectronics, East Fishkill, NY and Burlington, VT
pp. 331-336
Michael Orshansky , The University of Texas at Austin
Arnab Bandyopadhyay , The University of Texas at Austin
pp. 337-342
Jiayong Le , CMU, Pittsburgh, PA
Xin Li , CMU, Pittsburgh, PA
Lawrence T. Pileggi , CMU, Pittsburgh, PA
pp. 343-348
Panel: System-Level Design: Six Success Stories in Search of an Industry
New Ideas in Placement
Zhong Xiu , Carnegie Mellon University, Pittsburgh, Pennsylvania
James D. Ma , Carnegie Mellon University, Pittsburgh, Pennsylvania
Suzanne M. Fowler , Intel Corp., Chandler, Arizona
Rob A. Rutenbar , Carnegie Mellon University, Pittsburgh, Pennsylvania
pp. 351-356
Andrew B. Kahng , University of CA, San Diego
Sherief Reda , University of CA, San Diego
pp. 357-362
Dominic A. Antonelli , University of Notre Dame, IN
Danny Z. Chen , University of Notre Dame, IN
Timothy J. Dysart , University of Notre Dame, IN
Xiaobo S. Hu , University of Notre Dame, IN
Andrew B. Kahng , University of California, San Diego
Peter M. Kogge , University of Notre Dame, IN
Richard C. Murphy , University of Notre Dame, IN
Michael T. Niemier , University of Notre Dame, IN
pp. 363-368
Model Order Reduction and Variational Techniques for Parasitic Analysis
N. Wong , The University of Hong Kong
V. Balakrishnan , Purdue University, West Lafayette, IN
C.-K. Koh , Purdue University, West Lafayette, IN
pp. 369-374
Janet M. Wang , University of Arizona at Tucson
Omar A. Hafiz , University of Arizona at Tucson
Jun Li , ETOP Design Technology, Sunnyvale, California
pp. 375-380
Kanak Agarwal , University of Michigan, Ann Arbor
Dennis Sylvester , University of Michigan, Ann Arbor
David Blaauw , University of Michigan, Ann Arbor
Frank Liu , IBM Research, Austin
Sani Nassif , IBM Research, Austin
Sarma Vrudhula , University of Arizona, Tucson
pp. 381-384
L. Miguel Silveira , Technical University of Lisbon, Portugal
Joel R. Phillips , Cadence Design Systems, San Jose, CA
pp. 385-388
Compilation Techniques for Embedded Applications
Gaurav Mittal , Northwestern University, Evanston, IL
David C. Zaretsky , Northwestern University, Evanston, IL
Xiaoyong Tang , Northwestern University, Evanston, IL
P. Banerjee , Northwestern University, Evanston, IL
pp. 389-394
Philip Brisk , University of California, Los Angeles
Adam Kaplan , University of California, Los Angeles
Majid Sarrafzadeh , University of California, Los Angeles
pp. 395-400
O. Ozturk , Pennsylvania State University, University Park, PA
M. Kandemir , Pennsylvania State University, University Park, PA
G. Chen , Syracuse University, Syracuse, NY
M. J. Irwin , Pennsylvania State University, University Park, PA
pp. 401-406
Special Session: Platform-Based System Design
Mark Hopkins , STMicroelectronics, Inc., San Diego, CA
pp. 408
Alberto Sangiovanni-Vincentelli , University of California, Berkeley
Luca Carloni , University of California, Berkeley
Fernando De Bernardinis , University of California, Berkeley; Universit? di Pisa, Italy
Marco Sgroi , DoCoMo Euro-Labs, Munich, Germany
pp. 409-414
Max Baron , Microprocessor Report
pp. 415
Innovations in Logic Synthesis
David Ba?eres , Univ. Polit?cnica de Catalunya, Barcelona, Spain
Jordi Cortadella , Univ. Polit?cnica de Catalunya, Barcelona, Spain
Mike Kishinevsky , Strategic CAD Lab, Intel Corp., Hillsboro, OR
pp. 416-421
Tsutomu Sasao , Kyushu Institute of Technology, Japan
Munehiro Matsuura , Kyushu Institute of Technology, Japan
pp. 428-433
Kuo-Hua Wang , Fu Jen Catholic University, Taipei, Taiwan
Jia-Hung Chen , Fu Jen Catholic University, Taipei, Taiwan
pp. 434-437
Victor N. Kravets , IBM T. J. Watson Research Center, Yorktown Heights, NY
Prabhakar Kudva , IBM T. J. Watson Research Center, Yorktown Heights, NY
pp. 438-441
Yield Estimation and Optimization
Rajeev R. Rao , University of Michigan, Ann Arbor, MI
Anirudh Devgan , IBM Corporation, Austin, TX
David Blaauw , University of Michigan, Ann Arbor, MI
Dennis Sylvester , University of Michigan, Ann Arbor, MI
pp. 442-447
Sreeja Raj , University of Arizona
Sarma B. K. Vrudhula , University of Arizona
Janet Wang , University of Arizona
pp. 448-453
Seung Hoon Choi , Intel Corporation, Hillsboro, OR
Bipul C. Paul , Purdue University, W. Lafayette, IN
Kaushik Roy , Purdue University, W. Lafayette, IN
pp. 454-459
Farid N. Najm , University of Toronto, Canada
Noel Menezes , Intel Corporation, Hillsboro, Oregon
pp. 460-465
High-Level Techniques for Signal Processing
Abhijit K. Deb , Royal Institute of Technology, Sweden
Axel Jantsch , Royal Institute of Technology, Sweden
Johnny ?berg , Royal Institute of Technology, Sweden
pp. 466-471
Bin Wu , University of Toronto, Canada
Jianwen Zhu , University of Toronto, Canada
Farid N. Najm , University of Toronto, Canada
pp. 472-477
Changchun Shi , University of California at Berkeley
Robert W. Brodersen , University of California at Berkeley
pp. 478-483
Sanghamitra Roy , Northwestern University, Evanston, IL
Prith Banerjee , Northwestern University, Evanston, IL
pp. 484-487
Marghoob Mohiyuddin , The University of Texas at Austin
Adnan Aziz , The University of Texas at Austin
Amit Prakash , The University of Texas at Austin
Wayne Wolf , Princeton University
pp. 488-491
Advanced Test Solutions
Li-C. Wang , UC-Santa Barbara
T. M. Mak , Intel Corporation, Santa Clara, CA
Kwang-Ting Cheng , UC-Santa Barbara
Magdy S. Abadir , Motorola, Inc, Austin, TX
pp. 492-497
Vinay Verma , Xilinx Inc., San Jose, CA
Shantanu Dutt , University of Illinois at Chicago
Vishal Suthar , University of Illinois at Chicago
pp. 498-503
Wei Li , Univ. of Iowa, Iowa City
Sudhakar M. Reddy , Univ. of Iowa, Iowa City
Irith Pomeranz , Purdue University, West Lafayette, IN
pp. 504-509
Sungju Park , Hanyang University at Ansan, Korea
Sangwook Cho , Hanyang University at Ansan, Korea
Seiyang Yang , Pusan University, Korea
Maciej Ciesielski , University of Massachusetts
pp. 510-513
Bart Vermeulen , Philips Research Laboratories Eindhoven, The Netherlands
Mohammad Z. Urfianto , Royal Institute of Technology, Kista, Sweden
Sandeep K. Goel , Philips Research Laboratories, Eindhoven, The Netherlands
pp. 514-517
Advances in Boolean Analysis Techniques
Yoonna Oh , University of Michigan, Ann Arbor, MI
Maher N. Mneimneh , University of Michigan, Ann Arbor, MI
Zaher S. Andraus , University of Michigan, Ann Arbor, MI
Karem A. Sakallah , University of Michigan, Ann Arbor, MI
Igor L. Markov , University of Michigan, Ann Arbor, MI
pp. 518-523
Pankaj Chauhan , Carnegie Mellon University, Pittsburgh, PA
Edmund M. Clarke , Carnegie Mellon University, Pittsburgh, PA
Daniel Kroening , Carnegie Mellon University, Pittsburgh, PA
pp. 524-529
Paul T. Darga , The University of Michigan
Mark H. Liffiton , The University of Michigan
Karem A. Sakallah , The University of Michigan
Igor L. Markov , The University of Michigan
pp. 530-534
Chao Wang , University of Colorado at Boulder
HoonSang Jin , University of Colorado at Boulder
Gary D. Hachtel , University of Colorado at Boulder
Fabio Somenzi , University of Colorado at Boulder
pp. 535-538
Demosthenes Anastasakis , Synopsys, Inc., Hillsboro, OR
Lisa McIlwain , Synopsys, Inc., Hillsboro, OR
Slawomir Pilarski , University of Washington, Tacoma
pp. 539-542
Panel: Were the Good Old Days all that Good? EDA Then and Now
Power Optimization for Real-Time and Media-Rich Embedded Systems
Kihwan Choi , Univ. of Southern California, Los Angeles
Ramakrishna Soma , Univ. of Southern California, Los Angeles
Massoud Pedram , Univ. of Southern California, Los Angeles
pp. 544-549
Ying Zhang , Duke University, Durham, NC
Robert Dick , Northwestern University, Evanston, IL
Krishnendu Chakrabarty , Duke University, Durham, NC
pp. 550-555
Arun Kejariwal , University of California at Irvine
Sumit Gupta , University of California at Irvine
Alexandru Nicolau , University of California at Irvine
Nikil Dutt , University of California at Irvine
Rajesh Gupta , University of California at San Diego
pp. 556-561
Xiaoping Hu , Carnegie Mellon University, Pittsburgh, PA
Radu Marculescu , Carnegie Mellon University, Pittsburgh, PA
pp. 562-565
Siddharth Choudhuri , University of California, Irvine
Rabi N. Mahapatra , Texas A & M University
pp. 566-569
Latency Tolerance and Asynchronous Design
Vidyasagar Nookala , University of Minnesota, Minneapolis
Sachin S. Sapatnekar , University of Minnesota, Minneapolis
pp. 570-575
Mario R. Casu , Politecnico di Torino/CERCOM, Italy
Luca Macchiarulo , Politecnico di Torino/CERCOM, Italy
pp. 576-581
Qinghua Liu , Univ. of California, Santa Barbara
Malgorzata Marek-Sadowska , Univ. of California, Santa Barbara
pp. 582-587
Abhijit Davare , UC Berkeley, Berkeley, CA
Kelvin Lwin , Cadence Design Systems, San Jose, CA
Alex Kondratyev , Cadence Berkeley Labs, Berkeley, CA
Alberto Sangiovanni-Vincentelli , UC Berkeley, Berkeley, CA
pp. 588-591
Cheoljoo Jeong , Columbia University, New York, NY
Steven M. Nowick , Columbia University, New York, NY
pp. 592-595
New Technologies in System Design
Margarida Jacome , The University of Texas at Austin
Chen He , The University of Texas at Austin
Gustavo de Veciana , The University of Texas at Austin
Stephen Bijansky , The University of Texas at Austin
pp. 596-601
Jason Cong , University of California, Los Angeles
Yiping Fan , University of California, Los Angeles
Zhiru Zhang , University of California, Los Angeles
pp. 602-607
Bo Yang , Polytechnic University, Brooklyn, NY
Ramesh Karri , Polytechnic University, Brooklyn, NY
David A. McGrew , Cisco Systems, Inc., San Jose, CA
pp. 614-617
Massimo Conti , Universit? Politecnica delle Marche, Italy
Marco Caldari , Universit? Politecnica delle Marche, Italy
Giovanni B. Vece , Universit? Politecnica delle Marche, Italy
Simone Orcioni , Universit? Politecnica delle Marche, Italy
Claudio Turchetti , Universit? Politecnica delle Marche, Italy
pp. 618-621
Special Session: BioMEMS
Tom Korsmeyer , Coventor, Inc., Cambridge, Massachusetts
Jun Zeng , Coventor, Inc., Cambridge, Massachusetts
Ken Greiner , Coventor, Inc., Cambridge, Massachusetts
pp. 622-627
Jacob White , Massachusetts Institute of Technology, Cambridge, MA
pp. 629-632
Panel: Will Moore's Law Rule in the Land of Analog?
Floorplanning
Mongkol Ekpanyapong , Georgia Institute of Technology, Atlanta, GA
Jacob R. Minz , Georgia Institute of Technology, Atlanta, GA
Thaisiri Watewai , University of California, Berkeley, CA
Hsien-Hsin S. Lee , Georgia Institute of Technology, Atlanta, GA
Sung Kyu Lim , Georgia Institute of Technology, Atlanta, GA
pp. 634-639
Changbo Long , University of California, Los Angeles
Lucanus J. Simonson , University of California, Los Angeles
Weiping Liao , University of California, Los Angeles
Lei He , University of California, Los Angeles
pp. 640-645
Jing Li , Science and Technology of China
Tan Yan , Science and Technology of China
Bo Yang , Science and Technology of China
Juebang Yu , Science and Technology of China
Chunhui Li , Cadence, San Jose, CA
pp. 646-651
Issues in Timing Analysis
Dionysios Kouroussis , University of Toronto, Canada
Rubil Ahmadi , University of Toronto, Canada
Farid N. Najm , University of Toronto, Canada
pp. 652-657
Aseem Agarwal , University of Michigan, Ann Arbor, MI
Florentin Dartu , Intel Corporation, Hillsboro, OR
David Blaauw , University of Michigan, Ann Arbor, MI
pp. 658-663
Dongwoo Lee , University of Michigan, Ann Arbor, MI
Vladimir Zolotov , Motorola Inc. Austin, TX
David Blaauw , University of Michigan, Ann Arbor, MI
pp. 664-669
Special Session: ISSCC Highlights
Joachim Clabes , Kalla, Joseph McGill, Steve Dodson
Joshua Friedrich , Kalla, Joseph McGill, Steve Dodson
Mark Sweet , Kalla, Joseph McGill, Steve Dodson
Jack DiLullo , Kalla, Joseph McGill, Steve Dodson
Sam Chu , Kalla, Joseph McGill, Steve Dodson
Donald Plass , IBM Systems Group, Poughkeepsie, NY
James Dawson , IBM Systems Group, Poughkeepsie, NY
Paul Muench , IBM Systems Group, Poughkeepsie, NY
Larry Powell , Kalla, Joseph McGill, Steve Dodson
Michael Floyd , Kalla, Joseph McGill, Steve Dodson
Balaram Sinharoy , IBM Systems Group, Poughkeepsie, NY
Mike Lee , Kalla, Joseph McGill, Steve Dodson
Michael Goulet , Kalla, Joseph McGill, Steve Dodson
James Wagoner , Kalla, Joseph McGill, Steve Dodson
Nicole Schwartz , Kalla, Joseph McGill, Steve Dodson
Steve Runyon , Kalla, Joseph McGill, Steve Dodson
Gary Gorman , Kalla, Joseph McGill, Steve Dodson
Phillip Restle , IBM Research, Yorktown Heights, NY
Ronald Kalla , IBM Systems Group, Poughkeepsie, NY
Joseph McGill , IBM Systems Group, Poughkeepsie, NY
Steve Dodson , IBM Systems Group, Poughkeepsie, NY
pp. 670-672
Toshinari Takayanagi , Sun Microsystems, Inc., Sunnyvale, CA
Jinuk Luke Shin , Sun Microsystems, Inc., Sunnyvale, CA
Bruce Petrick , Sun Microsystems, Inc., Sunnyvale, CA
Jeffrey Su , Sun Microsystems, Inc., Sunnyvale, CA
Ana Sonia Leon , Sun Microsystems, Inc., Sunnyvale, CA
pp. 673-677
Daniel J. Deleganes , Intel Corporation, Hillsboro, Oregon
Micah Barany , Intel Corporation, Hillsboro, Oregon
George Geannopoulos , Intel Corporation, Hillsboro, Oregon
Kurt Kreitzer , Intel Corporation, Hillsboro, Oregon
Anant P. Singh , Intel Corporation, Hillsboro, Oregon
Sapumal Wijeratne , Intel Corporation, Hillsboro, Oregon
pp. 678-680
Special Session: Multiprocessor SoC MPSoC Solutions/Nightmare
Wayne Wolf , Princeton University, Princeton NJ
pp. 681-685
Chris Rowen , Tensilica, Inc., San Jose, CA
Steve Leibson , Tensilica, Inc., San Jose, CA
pp. 692-697
Panel: Is Statistical Timing Statistically Significant?
Timing Issues in Placement
Prashant Saxena , Intel Labs (CAD Research), Hillsboro, OR
Bill Halpin , Synplicity, Inc., Sunnyvale, CA
pp. 699-704
Bernd Obermeier , Technical University of Munich
Frank M. Johannes , Technical University of Munich
pp. 705-710
Milos Hrkic , University of Illinois at Chicago
John Lillis , University of Illinois at Chicago
Giancarlo Beraudo , University of Illinois at Chicago
pp. 711-716
Design Methodologies for ASIPs
Gunnar Braun , CoWare, Inc., Aachen, Germany
Achim Nohl , CoWare, Inc., Aachen, Germany
Weihua Sheng , Institute for Integrated Systems, Aachen, Germany
Jianjiang Ceng , Institute for Integrated Systems, Aachen, Germany
Manuel Hohenauer , Institute for Integrated Systems, Aachen, Germany
Hanno Scharw?chter , Institute for Integrated Systems, Aachen, Germany
Rainer Leupers , Institute for Integrated Systems, Aachen, Germany
Heinrich Meyr , Institute for Integrated Systems, Aachen, Germany
pp. 717-722
Pan Yu , National University of Singapore
Tulika Mitra , National University of Singapore
pp. 723-728
Partha Biswas , University of California, Irvine
Vinay Choudhary , Swiss Federal Institute of Technology, Lausanne, Switzerland
Kubilay Atasu , Swiss Federal Institute of Technology, Lausanne, Switzerland
Laura Pozzi , Swiss Federal Institute of Technology, Lausanne, Switzerland
Paolo Ienne , Swiss Federal Institute of Technology, Lausanne, Switzerland
Nikil Dutt , University of California, Irvine
pp. 729-734
FPGA-Based Systems
Fei Li , University of California, Los Angeles
Yan Lin , University of California, Los Angeles
Lei He , University of California, Los Angeles
pp. 735-740
Navaratnasothie Selvakkumaran , University of Minnesota
Abhishek Ranjan , HierDesign Inc
Salil Raje , HierDesign Inc
George Karypis , University of Minnesota
pp. 741-746
Nobuyuki Ohba , IBM Japan Ltd.
Kohji Takano , IBM Japan Ltd.
pp. 747-752
Special Session: Security as a New Dimension in Embedded System Design
Paul Kocher , Cryptography Research, San Francisco, CA
Ruby Lee , Princeton University, Princeton, NJ
Gary McGraw , Cigital, Dulles, VA
Anand Raghunathan , NEC Laboratories America, Princeton, NJ
Srivaths Ravi , NEC Laboratories America, Princeton, NJ
pp. 753-760
Leakage Power Optimization
Anup Kumar Sultania , University of Minnesota, Minneapolis, MN
Dennis Sylvester , University of Michigan, Ann Arbor, MI
Sachin S. Sapatnekar , University of Minnesota, Minneapolis, MN
pp. 761-766
Kaviraj Chopra , University of Arizona
Sarma B. K. Vrudhula , University of Arizona
pp. 767-772
Ashish Srivastava , University of Michigan, Ann Arbor, MI
Dennis Sylvester , University of Michigan, Ann Arbor, MI
David Blaauw , University of Michigan, Ann Arbor, MI
pp. 773-778
Harmander S. Deogun , University of Michigan - Ann Arbor
Rajeev R. Rao , University of Michigan - Ann Arbor
Dennis Sylvester , University of Michigan - Ann Arbor
David Blaauw , University of Michigan - Ann Arbor
pp. 779-782
Ashish Srivastava , University of Michigan, Ann Arbor, MI
Dennis Sylvester , University of Michigan, Ann Arbor, MI
David Blaauw , University of Michigan, Ann Arbor, MI
pp. 783-787
Interconnect Extraction
Shu Yan , Texas A&M University, College Station
Vivek Sarin , Texas A&M University, College Station
Weiping Shi , Texas A&M University, College Station
pp. 788-793
Dipanjan Gope , University of Washington, Seattle, WA
Swagato Chakraborty , University of Washington, Seattle, WA
Vikram Jandhyala , University of Washington, Seattle, WA
pp. 794-799
Satrajit Gupta , Carnegie Mellon University, Pittsburgh, PA
Lawrence T. Pileggi , Carnegie Mellon University, Pittsburgh, PA
pp. 800-805
Sharad Kapur , Integrand Software, Inc.
David E. Long , Integrand Software, Inc.
pp. 806-809
Yuichi Tanji , Kagawa University, Takamatsu, Japan
Hideki Asai , Shizuoka University, Hamamatsu, Japan
pp. 810-813
New Frontiers in Logic Synthesis
Shih-Chieh Chang , National Tsing Hua University, Hsinchu, Taiwan
Cheng-Tao Hsieh , National Tsing Hua University, Hsinchu, Taiwan
Kai-Chiang Wu , National Tsing Hua University, Hsinchu, Taiwan
pp. 814-819
Aiqun Cao , Purdue University, West Lafayette, IN
Cheng-Kok Koh , Purdue University, West Lafayette, IN
pp. 820-825
Peter Tummeltshammer , University of Technology, Vienna, Austria
James C. Hoe , Carnegie Mellon University
Markus P?schel , Carnegie Mellon University
pp. 826-829
Pawel Kerntopf , Warsaw University of Technology, Poland
pp. 834-837
William N. N. Hung , Intel Corporation, Hillsboro, Oregon
Xiaoyu Song , Portland State University, Portland, Oregon
Guowu Yang , Portland State University, Portland, Oregon
Jin Yang , Intel Corporation, Hillsboro, Oregon
Marek Perkowski , Portland State University, Portland, Oregon
pp. 838-841
Numerical Techniques for Simulation
Xin Li , Carnegie Mellon University, Pittsburgh, PA
Yang Xu , Carnegie Mellon University, Pittsburgh, PA
Peng Li , Carnegie Mellon University, Pittsburgh, PA
Padmini Gopalakrishnan , Carnegie Mellon University, Pittsburgh, PA
Lawrence T. Pileggi , Carnegie Mellon University, Pittsburgh, PA
pp. 842-847
Ting Mei , University of Minnesota, Minneapolis
Jaijeet Roychowdhury , University of Minnesota, Minneapolis
Todd S. Coffey , Sandia National Laboratories, Albuquerque, NM
Scott A. Hutchinson , Sandia National Laboratories, Albuquerque, NM
David M. Day , Sandia National Laboratories, Albuquerque, NM
pp. 848-853
G. Van der Plas , IMEC, Leuven, Belgium
M. Badaroglu , IMEC, Leuven, Belgium
G. Vandersteen , IMEC, Leuven, Belgium
P. Dobrovolny , IMEC, Leuven, Belgium
P. Wambacq , IMEC, Leuven, Belgium
S. Donnay , IMEC, Leuven, Belgium
G. Gielen , ESAT, K.U. Leuven, Belgium
H. De Man , IMEC, Leuven, Belgium; ESAT, K.U. Leuven, Belgium
pp. 854-859
Sheldon X.-D. Tan , University of California, Riverside
Weikun Guo , University of California, Riverside
Zhenyu Qi , University of California, Riverside
pp. 860-863
Baolin Yang , Cadence Design Systems, Inc.
Bruce McGaughy , Cadence Design Systems, Inc.
pp. 864-867
Energy and Thermal-Aware Design
Bo Zhai , University of Michigan, Ann Arbor, MI
David Blaauw , University of Michigan, Ann Arbor, MI
Dennis Sylvester , University of Michigan, Ann Arbor, MI
Krisztian Flautner , ARM Ltd., Cambridge, UK
pp. 868-873
R. Reed Taylor , Carnegie Mellon University, Pittsburgh, PA
Herman Schmit , Tabula, Inc., Mountain View, CA
pp. 874-877
Wei Huang , University of Virginia, Charlottesville
Mircea R. Stan , University of Virginia, Charlottesville
Kevin Skadron , University of Virginia, Charlottesville
Karthik Sankaranarayanan , University of Virginia, Charlottesville
Shougata Ghosh , University of Virginia, Charlottesville
Sivakumar Velusamy , University of Virginia, Charlottesville
pp. 878-883
Anirban Basu , University of California, Santa Barbara, CA
Sheng-Chih Lin , University of California, Santa Barbara, CA
Vineet Wason , University of California, Santa Barbara, CA
Amit Mehrotra , Berkeley Design Automation Inc., Santa Clara, CA
Kaustav Banerjee , University of California, Santa Barbara, CA
pp. 884-887
Noise-Tolerant Design and Analysis Techniques
Rouwaida Kanj , University of Illinois at Urbana-Champaign
Timothy Lehner , IBM Corporation, Hopewell Junction, New York
Bhavna Agrawal , IBM Corporation, Hopewell Junction, New York
Elyse Rosenbaum , University of Illinois at Urbana-Champaign
pp. 888-893
Chong Zhao , Univ. of California, San Diego
Xiaoliang Bai , Univ. of California, San Diego
Sujit Dey , Univ. of California, San Diego
pp. 894-899
Li Ding , University of Michigan, Ann Arbor
Pinaki Mazumder , University of Michigan, Ann Arbor
pp. 900-903
Lizheng Zhang , University of Wisconsin, Madison, WI
Yuhen Hu , University of Wisconsin, Madison, WI
Charlie Chungping Chen , National Taiwan University, Taipei
pp. 904-907
New Tools and Methods for Future Embedded SoC
Mohamed-Wassim Youssef , TIMA Laboratory, Grenoble, France
Sungjoo Yoo , TIMA Laboratory, Grenoble, France
Arif Sasongko , TIMA Laboratory, Grenoble, France
Yanick Paviot , TIMA Laboratory, Grenoble, France
Ahmed A. Jerraya , TIMA Laboratory, Grenoble, France
pp. 908-913
Srinivasan Murali , Stanford University, CA
Giovanni De Micheli , Stanford University, CA
pp. 914-919
Allen Cheng , The University of Michigan, Ann Arbor
Gary Tyson , Florida State University, Tallahassee
Trevor Mudge , The University of Michigan, Ann Arbor
pp. 920-923
Chidamber Kulkarni , Xilinx Inc, San Jose, Ca
Gordon Brebner , Xilinx Inc, San Jose, Ca
Graham Schelle , University of Colorado, Boulder, Co
pp. 924-927
New Scan-Based Test Techniques
Peter Wohl , Synopsys Inc., Williston, VT
John A. Waicukauski , Synopsys Inc., Tualatin, OR
Sanjay Patel , Synopsys Inc., Beaverton, OR
pp. 934-939
Irith Pomeranz , Purdue University, W. Lafayette, IN
pp. 940-943
Xiaoyun Sun , University of Minnesota, MN
Larry Kinney , University of Minnesota, MN
Bapiraju Vinnakota , University of Minnesota, MN
pp. 944-947
CAD for Reconfigurable Computing
Miljan Vuletic , Swiss Federal Institute of Technology Lausanne, Switzerland
Laura Pozzi , Swiss Federal Institute of Technology Lausanne, Switzerland
Paolo Ienne , Swiss Federal Institute of Technology Lausanne, Switzerland
pp. 948-953
Roman Lysecky , University of California, Riverside
Frank Vahid , University of California, Riverside
Sheldon X.-D. Tan , University of California, Riverside
pp. 954-959
Manish Handa , University of Cincinnati, OH
Ranga Vemuri , University of Cincinnati, OH
pp. 960-965
28 ms
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