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Design Automation Conference (2003)
Anaheim, CA
June 2, 2003 to June 6, 2003
ISBN: 1-58113-688-9
TABLE OF CONTENTS
SESSION 1: Special Session - Real Challenges and Solutions for Validating System-on-Chip
Tom Schubert , Intel Corporation, Hillsboro, OR
pp. 1
Yves Mathys , Motorola Inc., Switzerland
Andr? Ch?telain , Motorola Inc., Switzerland
pp. 7
SESSION 2: Panel - Reshaping EDA for Power
SESSION 3: Design for Manufacturability and Global Routing
P. Gupta , University of California at San Diego
A. B. Kahng , University of California at San Diego
D. Sylvester , University of Michigan at Ann Arbor
J. Yang , University of Michigan at Ann Arbor
pp. 16
Yu Chen , UCLA Computer Science Dept., Los Angeles, CA
Puneet Gupta , UCSD, La Jolla, CA
Andrew B. Kahng , UCSD, La Jolla, CA
pp. 22
Raia T. Hadsell , SUNY Binghamton CSD, Binghamton NY
Patrick H. Madden , SUNY Binghamton CSD, Binghamton NY
pp. 28
Jason Cong , University of California, Los Angeles
Ashok Jagannathan , University of California, Los Angeles
Glenn Reinman , University of California, Los Angeles
Michail Romesis , University of California, Los Angeles
pp. 32
SESSION 4: Design Analysis Techniques
Luca Benini , Univ. di Bologna, Italy
Alberto Macii , Politecnico di Torino, Italy
Enrico Macii , Politecnico di Torino, Italy
Elvira Omerbegovic , BullDAST s.r.l., Torino, Italy
Massimo Poncino , Univ. di Verona, Italy
Fabrizio Pro , BullDAST s.r.l., Torino, Italy
pp. 36
Franco Fummi , Universit? di Verona, Italy
Paolo Gallo , Telecom Italia Lab, Torino, Italy
Stefano Martini , Universit? di Verona, Italy
Giovanni Perbellini , Universit? di Verona, Italy
Massimo Poncino , Universit? di Verona, Italy
Fabio Ricciato , Telecom Italia Lab, Torino, Italy
pp. 42
Robertas Damasevicius , Kaunas University of Technology
Giedrius Majauskas , Kaunas University of Technology
Vytautas Stuikys , Kaunas University of Technology
pp. 48
SESSION 5: Embedded Hardware Design Case Studies
G. Kornaros , Ellemedia Technologies, Athens, Greece
I. Papaefstathiou , Ellemedia Technologies, Athens, Greece
A. Nikologiannis , Ellemedia Technologies, Athens, Greece
N. Zervos , Ellemedia Technologies, Athens, Greece
pp. 54
David Hwang , UCLA Electrical Engineering Department
Bo-Cheng Lai , UCLA Electrical Engineering Department
Patrick Schaumont , UCLA Electrical Engineering Department
Kazuo Sakiyama , UCLA Electrical Engineering Department
Yi Fan , UCLA Electrical Engineering Department
Shenglin Yang , UCLA Electrical Engineering Department
Alireza Hodjat , UCLA Electrical Engineering Department
Ingrid Verbauwhede , UCLA Electrical Engineering Department
pp. 60
Jennifer L. Wong , University of California, Los Angeles
Seapahn Megerian , University of California, Los Angeles
Miodrag Potkonjak , University of California, Los Angeles
pp. 66
SESSION 6: Special Session - Emerging Design and Tool Challenges in RF and Wireless Applications
Pieter W. Hooijmans , Philips Research Laboratories, The Netherlands
pp. 73
Jan Craninckx , IMEC, Leuven, Belgium
St?phane Donnay , IMEC, Leuven, Belgium
pp. 79
David E. Root , Agilent Technologies, Santa Rosa, CA
John Wood , Agilent Technologies, Santa Rosa, CA
Nick Tufillaro , Agilent Laboratories, Palo Alt, CA
pp. 85
SESSION 7: Panel - COT-Customer Owned Trouble
SESSION 8: Power Grid Analysis and Optimization
Haifeng Qian , University of Minnesota, Minneapolis
Sani R. Nassif , IBM Austin Research Labs, Austin, TX
Sachin S. Sapatnekar , University of Minnesota, Minneapolis
pp. 93
Dionysios Kouroussis , University of Toronto, Ontario, Canada
Farid N. Najm , University of Toronto, Ontario, Canada
pp. 99
Zhengyong Zhu , University of California, San Diego
Bo Yao , University of California, San Diego
Chung-Kuan Cheng , University of California, San Diego
pp. 105
Haihua Su , IBM Austin Research Lab, Austin, TX
Emrah Acar , IBM Austin Research Lab, Austin, TX
Sani R. Nassif , IBM Austin Research Lab, Austin, TX
pp. 109
Kai Wang , University of California, Santa Barbara
Malgorzata Marek-Sadowska , University of California, Santa Barbara
pp. 113
SESSION 9: Low-Power Embedded System Design
Dexin Li , University of California, Irvine
Qiang Xie , University of California, Irvine
Pai H. Chou , University of California, Irvine
pp. 119
Woo-Cheol Kwon , Samsung Electronics Co., Ltd., Kyounggi-Do, Korea
Taewhan Kim , Korea Advanced Institute of Science & Technology, Korea
pp. 125
Shaoxiong Hua , University of Maryland, College Park
Gang Qu , University of Maryland, College Park
Shuvra S. Bhattacharyya , University of Maryland, College Park
pp. 131
Anand Ramachandran , The University of Texas at Austin
Margarida F. Jacome , The University of Texas at Austin
pp. 137
SESSION 10: Cyclic and Non-Cyclic Combinational Circuit Synthesis
Alan Mishchenko , University of California, Berkeley
Xinning Wang , Intel Corporation, Hillsboro, OR
Timothy Kam , Intel Corporation, Hillsboro, OR
pp. 143
Alan Mishchenko , University of California, Berkeley
Tsutomu Sasao , Kyushu Institute of Technology, Japan
pp. 149
Yunjian Jiang , University of California, Berkeley
Slobodan Matic , University of California, Berkeley
Robert K. Brayton , University of California, Berkeley
pp. 155
Stephen A. Edwards , Columbia University, New York, NY
pp. 159
Marc D. Riedel , California Institute of Technology
Jehoshua Bruck , California Institute of Technology
pp. 163
SESSION 11: Managing Leakage Power
Saibal Mukhopadhyay , Purdue University, West Lafayette, IN
Arijit Raychowdhury , Purdue University, West Lafayette, IN
Kaushik Roy , Purdue University, West Lafayette, IN
pp. 169
Dongwoo Lee , University of Michigan, Ann Arbor, MI
Wesley Kwong , University of Michigan, Ann Arbor, MI
David Blaauw , University of Michigan, Ann Arbor, MI
Dennis Sylvester , University of Michigan, Ann Arbor, MI
pp. 175
Changbo Long , University of Wisconsin, Madison
Lei He , UCLA
pp. 181
Y-F. Tsai , Penn State University
D. Duarte , LTD, Intel Corporation
N. Vijaykrishnan , Penn State University
M. J. Irwin , Penn State University
pp. 187
Dongwoo Lee , University of Michigan, Ann Arbor, MI
David Blaauw , University of Michigan, Ann Arbor, MI
pp. 191
SESSION 12: Panel - Emerging Markets: Design Goes Global
SESSION 13: Timing-Oriented Placement
Giancarlo Beraudo , University of Illinois at Chicago
John Lillis , University of Illinois at Chicago
pp. 196
Chao-Yang Yeh , University of California, Santa Barbara
Malgorzata Marek-Sadowska , University of California, Santa Barbara
pp. 202
Jason Cong , University of California, Los Angeles
Xin Yuan , University of California, Los Angeles
pp. 208
Sung-Woo Hur , Donga University
Tung Cao , Intel Corporation
Karthik Rajagopal , Intel Corporation
Yegna Parasuram , Intel Corporation
Amit Chowdhary , Intel Corporation
Vladimir Tiourin , Intel Corporation
Bill Halpin , Syracuse Univ. and Intel Corporation
pp. 214
SESSION 14: Model Order Reduction
Zhanhai Qin , Synopsys, Incorporation
Chung-Kuan Cheng , Univ. of California, San Diego
pp. 220
Chirayu S. Amin , Northwestern Univ., Evanston, IL
Masud H. Chowdhury , Northwestern Univ., Evanston, IL
Yehea I. Ismail , Northwestern Univ., Evanston, IL
pp. 226
Shizhong Mei , Northwestern University, Evanston, IL
Chirayu Amin , Northwestern University, Evanston, IL
Yehea I. Ismail , Northwestern University, Evanston, IL
pp. 232
Emad Gad , Carleton University, Ontario, Canada
Michel Nakhla , Carleton University, Ontario, Canada
pp. 238
SESSION 15: Issues in Partitioning & Design Space Exploration for Codesign
Greg Stitt , University of California, Riverside
Roman Lysecky , University of California, Riverside
Frank Vahid , UC Irvine; University of California, Riverside
pp. 250
Kubilay Atasu , Swiss Federal Institute of Technology Lausanne (EPFL), Lausanne, Switzerland
Laura Pozzi , Swiss Federal Institute of Technology Lausanne (EPFL), Lausanne, Switzerland
Paolo Ienne , Swiss Federal Institute of Technology Lausanne (EPFL), Lausanne, Switzerland
pp. 256
Achim Nohl , CoWare, Inc., San Jose, CA
Volker Greive , CoWare, Inc., San Jose, CA
Gunnar Braun , CoWare, Inc., San Jose, CA
Andreas Hoffmann , CoWare, Inc., San Jose, CA
Rainer Leupers , Aachen University of Technology (RWTH), Aachen, Germany
Oliver Schliebusch , Aachen University of Technology (RWTH), Aachen, Germany
Heinrich Meyr , Aachen University of Technology (RWTH), Aachen, Germany
pp. 262
SESSION 16: Special Session - Nano Technology: Design Implications and CAD Challenges
Gary H. Bernstein , University of Notre Dame, IN
pp. 268
Islamshah Amlani , Motorola Labs, Tempe, AZ
Ruth Zhang , Motorola Labs, Tempe, AZ
John Tresek , Motorola Labs, Tempe, AZ
Larry Nagahara , Motorola Labs, Tempe, AZ
Raymond K. Tsui , Motorola Labs, Tempe, AZ
pp. 276
SESSION 17: Panel - Mixed Signals on Mixed-Signal: the Right Next Technology
SESSION 18: Simulation Coverage and Generation for Verification
Alon Gluska , Intel Israel, Haifa
pp. 280
Shai Fine , IBM Research Laboratory in Haifa, Israel
Avi Ziv , IBM Research Laboratory in Haifa, Israel
pp. 286
Nikhil Jayakumar , University of Colorado at Boulder
Mitra Purandare , University of Colorado at Boulder
Fabio Somenzi , University of Colorado at Boulder
pp. 292
Jun Yuan , Motorola Inc., Austin, TX
Ken Albin , Motorola Inc., Austin, TX
Adnan Aziz , University of Texas at Austin
Carl Pixley , Synopsys, Hillsboro, OR
pp. 296
SESSION 19: Tool Support for Architectural Decisions in Embedded Systems
Samar Abdi , University of California Irvine
Dongwan Shin , University of California Irvine
Daniel Gajski , University of California Irvine
pp. 300
Haris Lekatsas , NEC Labs America, Princeton, New Jersey; Vorras Corporation, Princeton, New Jersey
J? Henkel , NEC Labs America, Princeton, New Jersey
Srimat Chakradhar , NEC Labs America, Princeton, New Jersey
Venkata Jakkula , NEC Labs America, Princeton, New Jersey
Murugan Sankaradass , NEC Labs America, Princeton, New Jersey
pp. 306
SESSION 20: New Topics in Logic Synthesis
D. Michael Miller , University of Victoria, Canada
Dmitri Maslov , University of New Brunswick, Canada
Gerhard W. Dueck , University of New Brunswick, Canada
pp. 318
Stephen S. Bullock , The University of Michigan, Ann Arbor
Igor L. Markov , The University of Michigan, Ann Arbor
pp. 324
Roman Lysecky , University of California, Riverside
Frank Vahid , University of California, Riverside
pp. 334
SESSION 21: Special Session - Coping with Variability: The End of Deterministic Design
Shekhar Borkar , Circuit Research, Intel Labs, Hillsboro, OR
Tanay Karnik , Circuit Research, Intel Labs, Hillsboro, OR
Siva Narendra , Circuit Research, Intel Labs, Hillsboro, OR
Jim Tschanz , Circuit Research, Intel Labs, Hillsboro, OR
Ali Keshavarzi , Circuit Research, Intel Labs, Hillsboro, OR
Vivek De , Circuit Research, Intel Labs, Hillsboro, OR
pp. 338
Chandu Visweswariah , IBM Thomas J. Watson Research Center, Yorktown Heights, NY
pp. 343
Aseem Agarwal , University of Michigan, Ann Arbor, MI
David Blaauw , University of Michigan, Ann Arbor, MI
Vladimir Zolotov , Motorola, Inc., Austin, TX
Sarma Vrudhula , University of Arizona, Tucson, AZ
pp. 348
SESSION 22: Panel - Fast, Cheap and Under Control: The Next Implementation Fabric
SESSION 23: Testbench, Verification and Debugging: Practical Considerations
Serdar Tasiran , Ko? University, Istanbul, Turkey
Yuan Yu , Microsoft Research, Mountain View, CA
Brannon Batson , Intel Corporation, Santa Clara, CA
pp. 356
Yu-Chin Hsu , Novas Software Inc., San Jose, CA
Bassam Tabbara , Novas Software Inc., San Jose, CA
Yirng-An Chen , Novas Software Inc., San Jose, CA
Furshing Tsai , Novas Software Inc., San Jose, CA
pp. 362
Edmund Clarke , Carnegie Mellon University, Pittsburgh, PA
Daniel Kroening , Carnegie Mellon University, Pittsburgh, PA
Karen Yorav , Carnegie Mellon University, Pittsburgh, PA
pp. 368
Renate Henftling , Infineon Technologies AG, Munich, Germany
Andreas Zinn , Infineon Technologies AG, Munich, Germany
Matthias Bauer , Infineon Technologies AG, Munich, Germany
Martin Zambaldi , Infineon Technologies AG, Munich, Germany
Wolfgang Ecker , Infineon Technologies AG, Munich, Germany
pp. 372
SESSION 24: Delay and Noise Modeling in the Nanometer Regime
Kanak Agarwal , University of Michigan
Dennis Sylvester , University of Michigan
David Blaauw , University of Michigan
pp. 376
Charles J. Alpert , IBM Corp., Austin, Texas
Frank Liu , IBM Corp., Austin, Texas
Chandramouli Kashyap , IBM Corp., Austin, Texas
Anirudh Devgan , IBM Corp., Austin, Texas
pp. 382
John F. Croix , Silicon Metrics Corporation, Austin, Texas
D. F. Wong , University of Illinois at Urbana-Champaign
pp. 386
Bhavana Thudi , University of Michigan, Ann Arbor, MI
David Blaauw , University of Michigan, Ann Arbor, MI
pp. 390
SESSION 25: Modeling Issues in the Design of Embedded Systems
Jeffry T Russell , University of Texas at Austin
Margarida F Jacome , University of Texas at Austin
pp. 396
Andy D. Pimentel , University of Amsterdam, The Netherlands
Cagkan Erbas , University of Amsterdam, The Netherlands
pp. 402
JoAnn M. Paul , Carnegie Mellon University, Pittsburgh, PA
Alex Bobrek , Carnegie Mellon University, Pittsburgh, PA
Jeffrey E. Nelson , Carnegie Mellon University, Pittsburgh, PA
Joshua J. Pieper , Carnegie Mellon University, Pittsburgh, PA
Donald E. Thomas , Carnegie Mellon University, Pittsburgh, PA
pp. 408
Satya Kiran , Indian Institute of Technology Delhi
M.N. Jayram , Philips Research, Eindhoven, Netherlands
Pradeep Rao , Indian Institute of Science, Bangalore, India
S. K. Nandy , Indian Institute of Science, Bangalore, India
pp. 412
SESSION 26: Special Session - How Application/Technology Evolutions Will Shape Classical EDA?
Philippe Magarshack , Central R&D, STMicroelectronics, France
Pierre G. Paulin , Central R&D, STMicroelectronics, France
pp. 419
SESSION 27: SAT and BDD Algorithms for Verification Tools
Sanjit A. Seshia , Carnegie Mellon University, Pittsburgh, PA
Shuvendu K. Lahiri , Carnegie Mellon University, Pittsburgh, PA
Randal E. Bryant , Carnegie Mellon University, Pittsburgh, PA
pp. 425
Amit Goel , Carnegie Mellon University, Pittsburgh, PA
Gagan Hasteer , Innologic Systems, San Jose, CA
Randal E. Bryant , Carnegie Mellon University, Pittsburgh, PA
pp. 431
Feng Lu , University of California at Santa Barbara
Li-C. Wang , University of California at Santa Barbara
K.-T. (Tim) Cheng , University of California at Santa Barbara
John Moondanos , INTEL Corporation
Ziyad Hanna , INTEL Corporation
pp. 436
Kelvin Ng , University of British Columbia, Vancouver, BC
Mukul R Prasad , Fujitsu Laboratories of America, Sunnyvale, CA
Rajarshi Mukherjee , Fujitsu Laboratories of America, Sunnyvale, CA
Jawahar Jain , Fujitsu Laboratories of America, Sunnyvale, CA
pp. 442
SESSION 28: Elements of Functional and Performance Analysis
Giovanni Agosta , Politecnico di Milano Italy
Francesco Bruschi , Politecnico di Milano Italy
Donatella Sciuto , Politecnico di Milano Italy
pp. 448
Marek Jersak , Technical University of Braunschweig, Germany
Rolf Ernst , Technical University of Braunschweig, Germany
pp. 454
Xi Chen , University of California at Riverside
Harry Hsieh , University of California at Riverside
Felice Balarin , Cadence Berkeley Laboratories, Berkeley, CA
Yosinori Watanabe , Cadence Berkeley Laboratories, Berkeley, CA
pp. 460
Xianfeng Li , National University of Singapore
Tulika Mitra , National University of Singapore
Abhik Roychoudhury , National University of Singapore
pp. 466
SESSION 29: Nonlinear Model Order Reduction
Peng Li , Carnegie Mellon University, Pittsburgh, Pennsylvania
Lawrence T. Pileggi , Carnegie Mellon University, Pittsburgh, Pennsylvania
pp. 472
Xin Li , Carnegie Mellon University, Pittsburgh, PA
Peng Li , Carnegie Mellon University, Pittsburgh, PA
Yang Xu , Carnegie Mellon University, Pittsburgh, PA
Lawrence T. Pileggi , Carnegie Mellon University, Pittsburgh, PA
pp. 478
Ning Dong , University of Minnesota
Jaijeet Roychowdhury , University of Minnesota
pp. 484
Dmitry Vasilyev , Massachusetts Institute of Technology, Cambridge
Michal Rewienski , Massachusetts Institute of Technology, Cambridge
Jacob White , Massachusetts Institute of Technology, Cambridge
pp. 490
SESSION 30: Novel Techniques in High-Level Synthesis
Claire Fang Fang , Carnegie Mellon University
Rob A. Rutenbar , Carnegie Mellon University
Markus P?schel , Carnegie Mellon University
Tsuhan Chen , Carnegie Mellon University
pp. 496
Manish Amde , Indian Institute of Technology, Bombay, India
Ivan Blunno , Politecnico di Torino, Torino, Italy
Christos P. Sotiriou , FORTH, Heraklion, Greece
pp. 502
Catherine G. Wong , California Institute of Technology, Pasadena
Alain J. Martin , California Institute of Technology, Pasadena
pp. 508
Byoungro So , University of Southern California / Information Sciences Institute, Marina del Rey, California
Pedro C. Diniz , University of Southern California / Information Sciences Institute, Marina del Rey, California
Mary W. Hall , University of Southern California / Information Sciences Institute, Marina del Rey, California
pp. 514
SESSION 31: Mixed-Signal Design and Simulation
Robert M. Senger , University of Michigan, Ann Arbor, Michigan
Eric D. Marsman , University of Michigan, Ann Arbor, Michigan
Michael S. McCorquodale , University of Michigan, Ann Arbor, Michigan
Fadi H. Gebara , University of Michigan, Ann Arbor, Michigan
Keith L. Kraver , University of Michigan, Ann Arbor, Michigan
Matthew R. Guthaus , University of Michigan, Ann Arbor, Michigan
Richard B. Brown , University of Michigan, Ann Arbor, Michigan
pp. 520
Charlotte Y. Lau , Microsystems Technology Laboratory, MIT
Michael H. Perrott , Microsystems Technology Laboratory, MIT
pp. 526
V. Vasudevan , Indian Institute of Technology-Madras
M. Ramakrishna , Indian Institute of Technology-Madras
pp. 538
Alicia Manthe , University of Washington, Seattle
Zhao Li , University of Washington, Seattle
C.-J. Richard Shi , University of Washington, Seattle
pp. 542
SESSION 32: Panel - Nanometer Design: Place Your Bets
SESSION 33: Novel Self-Test Methods
Li Chen , University of California at San Diego
Srivaths Ravi , NEC Laboratories America, Inc., Princeton, NJ
Anand Raghunathan , NEC Laboratories America, Inc., Princeton, NJ
Sujit Dey , University of California at San Diego
pp. 548
Wei Li , Univ. of Iowa, Iowa City
Chaowen Yu , Univ. of Iowa, Iowa City
Sudhakar M. Reddy , Univ. of Iowa, Iowa City
Irith Pomeranz , Purdue University, West Lafayette, IN
pp. 554
Ahmad A. Al-Yamani , Stanford University, CA
Edward J. McCluskey , Stanford University, CA
pp. 560
Peter Wohl , Synopsys Inc., Williston, VT
John A. Waicukauski , Synopsys Inc., Tualatin, OR
Sanjay Patel , Synopsys Inc., Beaverton, OR
Minesh B. Amin , Synopsys Inc., Mountain View, CA
pp. 566
Marcelo Negreiros , Universidade Federal do Rio Grande do Sul - PPGC, Porto Alegre, RS, Brazil
Luigi Carro , Universidade Federal do Rio Grande do Sul - PPGC, Porto Alegre, RS, Brazil
Altamiro Amadeu Susin , Universidade Federal do Rio Grande do Sul - PPGC, Porto Alegre, RS, Brazil
pp. 570
SESSION 34: Technology Mapping, Buffering, and Bus Design
Bo Hu , Univ. of CA, Santa Barbara
Yosinori Watanabe , Cadence Berkeley Labs, CA
Alex Kondratyev , Cadence Berkeley Labs, CA
Malgorzata Marek-Sadowska , Univ. of CA, Santa Barbara
pp. 574
Weiping Shi , Texas A&M University, College Station, TX
Zhuo Li , Texas A&M University, College Station, TX
pp. 580
Maged Ghoneima , Northwestern University
Yehea Ismail , Northwestern University
pp. 586
Jihong Ren , University of British Columbia
Mark Greenstreet , University of British Columbia
pp. 592
SESSION 35: Compilation Techniques for Reconfigurable Devices
Pongstorn Maidee , University of Minnesota, Minneapolis
Cristinel Ababei , University of Minnesota, Minneapolis
Kia Bazargan , University of Minnesota, Minneapolis
pp. 598
Heidi E. Ziegler , University of Southern California / Information Sciences Institute, Marina del Rey, CA
Mary W. Hall , University of Southern California / Information Sciences Institute, Marina del Rey, CA
Pedro C. Diniz , University of Southern California / Information Sciences Institute, Marina del Rey, CA
pp. 610
Adam Kaplan , University of California, Los Angeles
Philip Brisk , University of California, Los Angeles
Ryan Kastner , University of California, Santa Barbara
pp. 616
SESSION 36: Architectural Power Estimation and Optimization
Monica Donno , BullDAST s.r.l., Torino, Italy
Alessandro Ivaldi , Politecnico di Torino, Italy
Luca Benini , Universit? di Bologna, Italy
Enrico Macii , Politecnico di Torino, Italy
pp. 622
Rizwan Bashirullah , North Carolina State University, Raleigh, NC
Wentai Liu , University of California, Santa Cruz
Ralph K. Cavin , Research Triangle Park, NC
pp. 628
Tali Moreshet , Brown University, Providence, RI
R. Iris Bahar , Brown University, Providence, RI
pp. 634
Reinaldo A. Bergamaschi , IBM T. J. Watson Research Center Yorktown, Heights, NY
Yunjian W. Jiang , University of California, Berkeley
pp. 638
SESSION 37: Panel - Libraries: Lifejacket or Straitjacket
SESSION 38: Techniques for Reconfigurable Logic Applications
Alireza Ejlali , Sharif University of technology, Tehran, Iran
Seyed Ghassem Miremadi , Sharif University of technology, Tehran, Iran
pp. 644
Fernanda Lima , Universidade Federal do Rio Grande do Sul
Luigi Carro , Universidade Federal do Rio Grande do Sul
Ricardo Reis , Universidade Federal do Rio Grande do Sul
pp. 650
Joan Carletta , The University of Akron, OH
Robert Veillette , The University of Akron, OH
Frederick Krach , The University of Akron, OH
Zhengwei Fang , The University of Akron, OH
pp. 656
SESSION 39: Test and Diagnosis for Complex Designs
Xijiang Lin , Mentor Graphics Corp., Wilsonville, OR
Rob Thompson , Mentor Graphics Corp., Wilsonville, OR
pp. 662
A. Krstic , University of California, Santa Barbara
L.-C. Wang , University of California, Santa Barbara
K.-T. Cheng , University of California, Santa Barbara
J.-J. Liou , Tsing-Hua University, Taiwan
T. M. Mak , Intel Corporation, Santa Clara, CA
pp. 668
Yu Huang , Mentor Graphics Co., Waltham, MA
Wu-Tung Cheng , Mentor Graphics Co., Wilsonville, OR
pp. 674
SESSION 40: Special Session - Highlights of ISSCC: High-Speed Heterogenous Design Techniques
Frank O'Mahony , Stanford University, CA
C. Patrick Yue , Aeluros, Inc., Mountain View, CA
Mark A. Horowitz , Stanford University, CA
S. Simon Wong , Stanford University, CA
pp. 682
John G. Maneatis , True Circuits, Inc., Los Altos, CA
Jaeha Kim , True Circuits, Inc., Los Altos, CA
Iain McClatchie , True Circuits, Inc., Los Altos, CA
Jay Maxey , Texas Instruments Incorporated, Dallas, TX
Manjusha Shankaradas , Texas Instruments Incorporated, Dallas, TX
pp. 688
M. Borgatti , STMicroelectronics, Central R&D, Agrate Brianza, Italy
L. Cal? , STMicroelectronics, Central R&D, Agrate Brianza, Italy
G. De Sandre , STMicroelectronics, Central R&D, Agrate Brianza, Italy
B. For? , STMicroelectronics, Central R&D, Agrate Brianza, Italy
D. Iezzi , STMicroelectronics, Central R&D, Agrate Brianza, Italy
F. Lertora , STMicroelectronics, Central R&D, Agrate Brianza, Italy
G. Muzzi , STMicroelectronics, Central R&D, Agrate Brianza, Italy
M. Pasotti , STMicroelectronics, Central R&D, Agrate Brianza, Italy
M. Poles , STMicroelectronics, Central R&D, Agrate Brianza, Italy
P. L. Rolandi , STMicroelectronics, Central R&D, Agrate Brianza, Italy
pp. 691
SESSION 41: Special Session - Highlights of ISSCC and The Design of State-of-the-Art Microprocessors
Yiu-Hing Chan , IBM Server Group, Poughkeepsie, NY
Prabhakar Kudva , IBM TJ Watson Research Center, Yorktown Heights, NY
Lisa Lacey , IBM TJ Watson Research Center, Yorktown Heights, NY
Greg Northrop , IBM TJ Watson Research Center, Yorktown Heights, NY
Thomas Rosser , IBM Server Group, Austin, TX
pp. 696
Hisashige Ando , Fujitsu Ltd. Kawasaki, Japan
Yuuji Yoshida , Fujitsu Ltd. Kawasaki, Japan
Aiichiro Inoue , Fujitsu Ltd. Kawasaki, Japan
Itsumi Sugiyama , Fujitsu Ltd. Kawasaki, Japan
Takeo Asakawa , Fujitsu Ltd. Kawasaki, Japan
Kuniki Morita , Fujitsu Ltd. Kawasaki, Japan
Toshiyuki Muta , Fujitsu Ltd. Kawasaki, Japan
Tsuyoshi Motokurumada , Fujitsu Ltd. Kawasaki, Japan
Seishi Okada , Fujitsu Ltd. Kawasaki, Japan
Hideo Yamashita , Fujitsu Ltd. Kawasaki, Japan
Yoshihiko Satsukawa , Fujitsu Ltd. Kawasaki, Japan
Akihiko Konmoto , Fujitsu Ltd. Kawasaki, Japan
Ryouichi Yamashita , Fujitsu Ltd. Kawasaki, Japan
Hiroyuki Sugiyama , Fujitsu Ltd. Kawasaki, Japan
pp. 702
Jason Stinson , Intel Corporation, Santa Clara, CA
Stefan Rusu , Intel Corporation, Santa Clara, CA
pp. 706
SESSION 42: Panel - Formal Verification - Prove It or Pitch It
SESSION 43: High Frequency Interconnect Modeling
Zhenhai Zhu , Massachusetts Institute of Technology, Cambridge
Ben Song , Massachusetts Institute of Technology, Cambridge
Jacob White , Massachusetts Institute of Technology, Cambridge
pp. 712
D. Goren , IBM Haifa Research and Development Labs, Israel
M. Zelikson , IBM Haifa Research and Development Labs, Israel
R. Gordin , IBM Haifa Research and Development Labs, Israel
I. A. Wagner , IBM Haifa Research and Development Labs, Israel
A. Barger , IBM Haifa Research and Development Labs, Israel
A. Amir , IBM Haifa Research and Development Labs, Israel
B. Livshitz , IBM Haifa Research and Development Labs, Israel
A. Sherman , IBM Haifa Research and Development Labs, Israel
Y. Tretiakov , IBM Design Automation Dept., Burlington
R. Groves , IBM SiGe Model Development, East Fishkill
J. Park , IBM SiGe Model Development, East Fishkill
D. Jordan , IBM Design Automation Dept., Burlington
S. Strang , IBM Design Automation Dept., Burlington
R. Singh , IBM Design Automation Dept., Burlington
C. Dickey , IBM Design Automation Dept., Burlington
D. Harame , IBM Design Automation Dept., Burlington
pp. 724
Guoan Zhong , Purdue University, West Lafayette, IN
Cheng-Kok Koh , Purdue University, West Lafayette, IN
Venkataramanan Balakrishnan , Purdue University, West Lafayette, IN
Kaushik Roy , Purdue University, West Lafayette, IN
pp. 728
SESSION 44: Novel Approaches in Test Cost Reduction
Anuja Sehgal , Duke University, Durham, NC
Vikram Iyengar , IBM Microelectronics, Essex Jct, VT
Mark D. Krasniewski , Duke University, Durham, NC
Krishnendu Chakrabarty , Duke University, Durham, NC
pp. 738
Dong Xiang , Tsinghua University, Beijing, China
Shan Gu , Tsinghua University, Beijing, China
Jia-Guang Sun , Tsinghua University, Beijing, China
Yu-liang Wu , The Chinese Univ. of Hong Kong, Shatin N.T., Hong Kong
pp. 744
Irith Pomeranz , Purdue University, W. Lafayette, IN
Sudhakar M. Reddy , University of Iowa, Iowa City
pp. 748
SESSION 45: Retargetable Tools for Embedded Software
Wai Sum Mong , University of Toronto, Ontario, Canada
Jianwen Zhu , University of Toronto, Ontario, Canada
pp. 752
Mehrdad Reshadi , University of California, Irvine
Prabhat Mishra , University of California, Irvine
Nikil Dutt , University of California, Irvine
pp. 758
Wei Qin , Princeton University, NJ
Sharad Malik , Princeton University, NJ
pp. 764
SESSION 46: Special Session - ASIC Design in Nanometer Era - Dead or Alive?
David E. Lackey , IBM Microelectronics Division, Essex Junction, VT
Paul S. Zuchowski , IBM Microelectronics Division, Essex Junction, VT
Juergen Koehl , IBM Microelectronics Division, Essex Junction, VT
pp. 770
Clive Bittlestone , Texas Instruments Inc. Dallas Texas
Anthony Hill , Texas Instruments Inc. Dallas Texas
Vipul Singhal , Texas Instruments Inc. Dallas Texas
N.V. Arvind , Texas Instruments Inc. Dallas Texas
pp. 776
L. Pileggi , Carnegie Mellon University, Pittsburgh, Pennsylvania
H. Schmit , Carnegie Mellon University, Pittsburgh, Pennsylvania
A. J. Strojwas , Carnegie Mellon University, Pittsburgh, Pennsylvania
P. Gopalakrishnan , Carnegie Mellon University, Pittsburgh, Pennsylvania
V. Kheterpal , Carnegie Mellon University, Pittsburgh, Pennsylvania
A. Koorapaty , Carnegie Mellon University, Pittsburgh, Pennsylvania
C. Patel , Carnegie Mellon University, Pittsburgh, Pennsylvania
V. Rovner , Carnegie Mellon University, Pittsburgh, Pennsylvania
K. Y. Tong , Carnegie Mellon University, Pittsburgh, Pennsylvania
pp. 782
Ruchir Puri , IBM Research, Yorktown Hts, NY
Leon Stok , IBM Research, Yorktown Hts, NY
John Cohn , IBM Microelectronics, Essex Jn, VT
David Kung , IBM Research, Yorktown Hts, NY
David Pan , IBM Research, Yorktown Hts, NY
Dennis Sylvester , University of Michigan, Ann Arbor, MI
Ashish Srivastava , University of Michigan, Ann Arbor, MI
Sarvesh Kulkarni , University of Michigan, Ann Arbor, MI
pp. 788
SESSION 47: Floorplanning and Placement
Hongyu Chen , University of California, San Diego
Chung-Kuan Cheng , University of California, San Diego
Nan-Chi Chou , Mentor Graphics Corporation, San Jose, CA
Andrew B. Kahng , University of California, San Diego
John F. MacDonald , Mentor Graphics Corporation, San Diego, CA
Peter Suaris , Mentor Graphics Corporation, Wilsonville, OR
Bo Yao , University of California, San Diego
Zhengyong Zhu , University of California, San Diego
pp. 794
Bo Hu , Univ. of California, Santa Barbara
Malgorzata Marek-Sadowska , Univ. of California, Santa Barbara
pp. 800
Yuchun Ma , Tsinghua University, Beijing, China
Xianlong Hong , Tsinghua University, Beijing, China
Sheqin Dong , Tsinghua University, Beijing, China
Song Chen , Tsinghua University, Beijing, China
Yici Cai , Tsinghua University, Beijing, China
C. K. Cheng , University of California, San Diego
Jun Gu , Science & Technology University of Hong Kong
pp. 806
Hsun-Cheng Lee , Synopsys Inc., Taipei, Taiwan
Yao-Wen Chang , National Taiwan University, Taipei, Taiwan
Jer-Ming Hsu , National Center for High-Performance Computing, Hsinchu, Taiwan
Hannah H. Yang , Intel Corporation, Hillsboro, OR
pp. 812
SESSION 48: Advances in SAT
Robert Damiano , Synopsys, Inc., Hillsboro, OR
James Kukula , Synopsys, Inc., Hillsboro, OR
pp. 818
Aarti Gupta , NEC Labs America, Princeton, NJ
Malay Ganai , NEC Labs America, Princeton, NJ
Chao Wang , University of Colorado, Boulder
Zijiang Yang , NEC Labs America, Princeton, NJ
Pranav Ashar , NEC Labs America, Princeton, NJ
pp. 824
Donald Chai , University of California at Berkeley
Andreas Kuehlmann , Cadence Berkeley Labs, Berkeley, CA
pp. 830
Fadi A. Aloul , University of Michigan
Igor L. Markov , University of Michigan
Karem A. Sakallah , University of Michigan
pp. 836
Hyeong-Ju Kang , KAIST, Korea
In-Cheol Park , KAIST, Korea
pp. 840
SESSION 49: Novel Design Methodologies and Signal Integrity
Gilles-Eric Descamps , Silicon Access Networks Inc., San Jose, CA
Satish Bagalkotkar , Silicon Access Networks Inc., San Jose, CA
Subramanian Ganesan , Silicon Access Networks Inc., San Jose, CA
Satish Iyengar , Silicon Access Networks Inc., San Jose, CA
Alain Pirson , Silicon Access Networks Inc., San Jose, CA
pp. 844
Kaijian Shi , Professional Services, Synopsys Inc., Dallas, TX
Graig Godwin , Texas Instruments, Inc., Dallas, TX
pp. 850
Imad A. Ferzli , University of Toronto, Ontario, Canada
Farid N. Najm , University of Toronto, Ontario, Canada
pp. 856
Donald Chai , University of California, Berkeley
Alex Kondratyev , Cadence Berkeley Labs, Berkeley, CA
Yajun Ran , University of California, Santa Barbara
Kenneth H. Tseng , Cadence Design Systems, San Jose, CA
Yosinori Watanabe , Berkeley, CA 94704
Malgorzata Marek-Sadowska , University of California, Santa Barbara
pp. 860
Ken Tseng , Cadence Design Systems
Vinod Kariat , Cadence Design Systems
pp. 864
SESSION 50: Memory Optimization for Embedded Systems
Prabhat Jain , Massachusetts Institute of Technology, Cambridge
G. Edward Suh , Massachusetts Institute of Technology, Cambridge
Srinivas Devadas , Massachusetts Institute of Technology, Cambridge
pp. 869
Tony Givargis , University of California, Irvine
pp. 875
Yoonseo Choi , Korea Advanced Institute of Science and Technology, KOREA
Taewhan Kim , Korea Advanced Institute of Science and Technology, KOREA
pp. 881
W. Zhang , The Pennsylvania State University, University Park
G. Chen , The Pennsylvania State University, University Park
M. Kandemir , The Pennsylvania State University, University Park
M. Karakoy , Imperial College, London, UK
pp. 887
SESSION 51: Special Session - Design Automation for Quantum Circuits
John P. Hayes , University of Michigan, Ann Arbor
pp. 893
SESSION 52: Energy-Aware System Design
Vijay Raghunathan , UC Los Angeles, CA
Mani B. Srivastava , UC Los Angeles, CA
Rajesh K. Gupta , UC San Diego, CA
pp. 900
Kihwan Choi , Univ. of Southern California, Los Angeles
Kwanho Kim , Seoul National University, Korea
Massoud Pedram , Univ. of Southern California, Los Angeles
pp. 912
M. Josie Ammer , University of California, Berkeley
Michael Sheets , University of California, Berkeley
Tufan Karalar , University of California, Berkeley
Mika Kuulusa , University of California, Berkeley
Jan Rabaey , University of California, Berkeley
pp. 916
SESSION 53: Budgeting, Simulation and Statistical Timing
E. Bozorgzadeh , University of California, Los Angeles (UCLA)
S. Ghiasi , University of California, Los Angeles (UCLA)
A. Takahashi , Tokyo Institute of Technology, Japan
M. Sarrafzadeh , University of California, Los Angeles (UCLA)
pp. 920
J. A. G. Jess , Eindhoven University of Technology, The Netherlands
K. Kalafala , IBM Microelectronics Division, East Fishkill, NY
S. R. Naidu , Eindhoven University of Technology, The Netherlands
R. H. J. M. Otten , Eindhoven University of Technology, The Netherlands
C. Visweswariah , IBM Thomas J. Watson Research Center, Yorktown Heights, NY
pp. 932
SESSION 54: Interconnect Noise Avoidance Methodologies & Slew Rate Prediction
Rajesh Kumar , Intel Corp, Hillsboro, Oregon
pp. 938
Yajun Ran , University of California, Santa Barbara
Malgorzata Marek-Sadowska , University of California, Santa Barbara
pp. 944
Kanak Agarwal , University of Michigan
Dennis Sylvester , University of Michigan
David Blaauw , University of Michigan
pp. 950
Murat R. Becer , Motorola Inc.
David Blaauw , Univ. of Michigan Ann Arbor
Ilan Algor , Motorola Inc.
Rajendran Panda , Motorola Inc.
Chanhee Oh , Motorola Inc.
Vladimir Zolotov , Motorola Inc.
Ibrahim N. Hajj , Univ. of Illinois Urbana-Champaign
pp. 954
SESSION 55: Analog Design Space Exploration
Guido Stehr , Technical University of Munich, Germany
Helmut Graeb , Technical University of Munich, Germany
Kurt Antreich , Technical University of Munich, Germany
pp. 958
F. De Bernardinis , University of California, Berkeley; Universit? di Pisa, Italy
M. I. Jordan , University of California, Berkeley
A. Sangiovanni-Vincentelli , University of California, Berkeley
pp. 964
Maria del Mar Hershenson , Barcelona Design, Inc., Newark, CA
pp. 970
Martin Vogels , Katholieke Universiteit Leuven, Belgium
Georges Gielen , Katholieke Universiteit Leuven, Belgium
pp. 974
Author Index (PDF)
pp. 978
26 ms
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