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37th Conference on Design Automation (DAC'00)
Run-Time Voltage Hopping for Low-Power Real-Time Systems
Los Angeles, CA
June 05-June 09
ISBN: 1-58113-1897-9
Takayasu Sakurai, University of Tokyo, Japan
Seongsoo Lee, University of Tokyo, Japan
This paper presents a novel run-time dynamic voltage scaling scheme for low-power real-time systems. It employs software feedback control of supply voltage, which is applicable to off-the-shelf processors. It avoids interface problems from variable clock frequency. It provides efficient power reduction by fully exploiting slack time arising from workload variation. Using software analysis environment, the proposed scheme is shown to achieve 80~94% power reduction for typical real-time multimedia applications.
Index Terms:
fault modeling, fault simulation, hard faults, test vector generation
Citation:
Takayasu Sakurai, Seongsoo Lee, "Run-Time Voltage Hopping for Low-Power Real-Time Systems," dac, pp.806-809, 37th Conference on Design Automation (DAC'00), 2000
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