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Los Angeles, CA
June 5, 2000 to June 9, 2000
ISBN: 1-58113-1897-9
pp: 507-512
Jon Stockwood , Synopsys Inc., Mountain View, CA
Randolph Harr , Synopsys Inc., Mountain View, CA
Tim Callahan , Univ. of California, Berkeley, CA
Uday Kurkure , Synopsys Inc., Mountain View, CA
Ervan Darnell , Silicon Spice, Mountain View, CA
Yanbing Li , Synopsys Inc., Mountain View, CA
In this paper we describe a new hardware/software partitioning approach for embedded reconfigurable architectures consisting of a general-purpose processor (CPU), a dynamically reconfigurable datapath (e.g. an FPGA), and a memory hierarchy. We have developed a framework called Nimble that automatically compiles system-level applications specified in C to executables on the target platform. A key component of this framework is a hardware/software partitioning algorithm that performs fine-grained partitioning (at loop and basic-block levels) of an application to execute on the combined CPU and datapath. The partitioning algorithm optimizes the global application execution time, including the software and hardware execution times, communication time and datapath reconfiguration time. Experimental results on real applications show that our algorithm is effective in rapidly finding close to optimal solutions.
Jon Stockwood, Randolph Harr, Tim Callahan, Uday Kurkure, Ervan Darnell, Yanbing Li, "Hardware-Software Co-Design of Embedded Reconfigurable Architectures", DAC, 2000, Design Automation Conference, Design Automation Conference 2000, pp. 507-512, doi:10.1109/DAC.2000.855363
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