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37th Conference on Design Automation (DAC'00)
Maze Routing with Buffer Insertion and Wiresizing
Los Angeles, CA
June 05-June 09
ISBN: 1-58113-1897-9
D. F. Wong, The University of Texas at Austin
Minghorng Lai, The University of Texas at Austin
We propose an elegant formulation of the Maze Routing with Buffer Insertion and Wiresizing problem as a graph-theoretic shortest path problem. This formulation provides time and space performance improvements over previously proposed dynamic-programming based techniques. Routing constraints such as wiring obstacles and restrictions on buffer locations and types are easily incorporated in the formulation. Furthermore, efficient software routines solving shortest path problems in existing graph application libraries can be applied. We construct a BP-Graph such that the length of every path in this graph is equal to the Elmore delay. Therefore, finding the minimum Elmore delay path becomes a finite shortest path problem. The buffer choices and insertion locations are represented as the vertices in the BP-Graph. The inter connect wires are sized by constructing a look-up table for buffer-to-buffer wiresizing solutions. We also provide a technique that is able to tremendously improve the runtime. Experiments show improvements over previously proposed methods.
Index Terms:
nanotechnology, quantum cellular automata
Citation:
D. F. Wong, Minghorng Lai, "Maze Routing with Buffer Insertion and Wiresizing," dac, pp.374-378, 37th Conference on Design Automation (DAC'00), 2000
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