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37th Conference on Design Automation (DAC'00)
An Asymptotically Constant, Linearly Bounded Methodology for the Statistical Simulation of Analog Circuits Including Component Mismatch Effects
Los Angeles, CA
June 05-June 09
ISBN: 1-58113-1897-9
Patrick McNamara, PDF Solutions Inc., San Jose, CA
Phillip Schumaker, PDF Solutions Inc., San Jose, CA
Sharad Saxena, PDF Solutions Inc., San Jose, CA
Dale Coder, PDF Solutions Inc., San Jose, CA
Carlo Gaurdiani, PDF Solutions Inc., San Jose, CA
This paper presents a new statistical methodology to simulate the effect of both inter-die and intra-die variation on the electrical performance of analog integrated circuits. The main feature of this methodology is that it accounts for device mismatch by using a number of variables that is asymptotically constant in the limit of perfectly matching devices, and is typically close to the number of independent process factors normally used to account for inter-die process variations only. A unified model of process variation allows the effects of each source of variation and their joint impact to be estimated, thus providing designers more accurate analysis and variance optimization capability. State-of-the-art application examples demonstrate the accuracy and efficiency of this approach.
Index Terms:
fault modeling, fault simulation, hard faults, test vector generation
Citation:
Patrick McNamara, Phillip Schumaker, Sharad Saxena, Dale Coder, Carlo Gaurdiani, "An Asymptotically Constant, Linearly Bounded Methodology for the Statistical Simulation of Analog Circuits Including Component Mismatch Effects," dac, pp.15-18, 37th Conference on Design Automation (DAC'00), 2000
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