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Design Automation Conference (1997)
Anaheim, CA
June 9, 1997 to June 13, 1997
ISBN: 0-89791-920-3
TABLE OF CONTENTS
Reviewers (PDF)
pp. xii
Session 1: Sequential Synthesis
Naresh Maheshwari , Iowa State University, Ames
Sachin S. Sapatnekar , Iowa State University, Ames
pp. 2
Ellen M. Sentovich , Cadence Berkeley Labs
Horia Toma , CMA - Ecole des Mines de Paris
G?rard Berry , CMA - Ecole des Mines de Paris
pp. 8
Diana Marculescu , University of Southern California, Los Angeles
Radu Marculescu , University of Southern California, Los Angeles
Massoud Pedram , University of Southern California, Los Angeles
pp. 12
A. Semenov , University of Newcastle, England
A. Yakovlev , University of Newcastle, England
E. Pastor , Universitat Polit?cnica de Catalunya, Spain
M. A. Pe? , Universitat Polit?cnica de Catalunya, Spain
J. Cortadella , Universitat Polit?cnica de Catalunya, Spain
pp. 16
Luca Benini , Stanford University, CA
Enrico Macii , Politecnico di Torino, Italy
Massimo Poncino , Politecnico di Torino, Italy
pp. 22
Session 2: Interconnect Modeling
I. M. Elfadel , IBM T. J. Watson Research Center, Yorktown Heights, NY
David D. Ling , IBM T. J. Watson Research Center, Yorktown Heights, NY
pp. 28
Ketih Nabors , Cadence Design Systems, San Jose, CA
Tze-Ting Fang , Cadence Design Systems, San Jose, CA
Hung-Wen Chang , Cadence Design Systems, San Jose, CA
Kenneth S. Kundert , Cadence Design Systems, San Jose, CA
Jacob K. White , Massachusetts Institute of Technology, Cambridge, MA
pp. 40
Florentin Dartu , Carnegie Mellon University, Pittsburgh, PA
Lawrence T. Pileggi , Carnegie Mellon University, Pittsburgh, PA
pp. 46
Session 3: Novel Techniques for Software Scheduling
Felice Balarin , Cadence Berkeley Laboratories
Alberto Sangiovanni-Vincentelli , University of California at Berkeley
pp. 52
Yosef G. Tirat-Gefen , Mentor Graphics Corp., Wilsonville, OR
Diogenes C. Silva , Univ. of Southern California, Los Angeles
Alice C. Parker , Univ. of Southern California, Los Angeles
pp. 58
Marleen Ad? , Katholieke Universiteit Leuven, Belgium
Rudy Lauwereins , Katholieke Universiteit Leuven, Belgium
J. A. Peperstraete , Katholieke Universiteit Leuven, Belgium
pp. 64
Session 4: Embedded Tutorial
Jerry Frenkil , Sente, Inc., Chelmsford, MA
pp. 76
Panel
Session 5: Simulation Techniques for Microprocessors
Joon-Seo Yim , KAIST, Taejon, Korea
Yoon-Ho Hwang , KAIST, Taejon, Korea
Chang-Jae Park , KAIST, Taejon, Korea
Hoon Choi , KAIST, Taejon, Korea
Woo-Seung Yang , KAIST, Taejon, Korea
Hun-Seung Oh , KAIST, Taejon, Korea
In-Cheol Park , KAIST, Taejon, Korea
Chong-Min Kyung , KAIST, Taejon, Korea
pp. 83
J?rg Walter , IBM Deutschland Entwicklung GmbH, Germany
Jens Leenstra , IBM Deutschland Entwicklung GmbH, Germany
Gerhard D?ttling , IBM Deutschland Entwicklung GmbH, Germany
Bernd Leppla , IBM Deutschland Entwicklung GmbH, Germany
Hans-J?rgen M?nster , IBM Deutschland Entwicklung GmbH, Germany
Kevin Kark , IBM Corp., NY
Bruce Wile , IBM Corp., NY
pp. 89
Rajesh Raina , Motorola Inc., Austin, TX
Robert Bailey , Motorola Inc., Austin, TX
Charles Njinda , Advanced Micro Devices, Sunnyvale, CA
Robert Molyneaux , IBM Corporation, Austin, TX
Charlie Beh , IBM Corporation, Austin, TX
pp. 95
Wen-Jong Fang , Tsing Hua University, Taiwan
Allen C.-H. Wu , Tsing Hua University, Taiwan
Ti-Yen Yen , Quickturn Design Systems, Inc., Mountain View, CA
pp. 101
Session 6: Combinational Logic Synthesis
Yibin Ye , Purdue University, West Lafayette, IN
Kaushik Roy , Purdue University, West Lafayette, IN
pp. 107
Tai-Hung Liu , The University of Texas, Austin
Khurram Sajid , The University of Texas, Austin
Adnan Aziz , The University of Texas, Austin
Vigyan Singhal , Cadence Berkeley Labs, Berkeley, CA
pp. 113
Stan Liao , Advanced Technology Group, Synopsys, Inc.
Srinivas Devadas , Department of EECS, MIT
pp. 117
Olivier Coudert , Synopsys, Inc., Mountain View, CA
pp. 121
Session 7: Interconnect Parasitic Extraction
E. Aykut Dengi , Motorola Inc., Austin, TX
Ronald A. Rohrer , Carnegie Mellon University, Pittsburgh, PA
pp. 127
Michael W. Beattie , Carnegie Mellon University, Pittsburgh, PA
Lawrence T. Pileggi , Carnegie Mellon University, Pittsburgh, PA
pp. 133
Zhijiang He , Carnegie Mellon University, Pittsburgh, PA
Mustafa Celik , Carnegie Mellon University, Pittsburgh, PA
Lawrence Pileggi , Carnegie Mellon University, Pittsburgh, PA
pp. 137
Sharad Kapur , Bell Labs Lucent Technologies, Murray Hill, NJ
Jinsong Zhao , UC Santa Cruz, CA
pp. 141
Session 8: Advances in Timing Analysis for Embedded Software
Sharad Malik , Princeton University
Margaret Martonosi , Princeton University
Yau-Tsun Steven Li , Princeton University
pp. 147
Yanbing Li , Princeton University, NJ
Wayne Wolf , Princeton University, NJ
pp. 153
Rajeshkumar S. Sambandam , Level One Communications, Inc., Sacramento, CA
Xiaobo (Sharon) Hu , University of Notre Dame, IN
pp. 157
Session 9: Applications of Formal Verification
Kyle L. Nelson , IBM Corporation, Rochester, MN
Alok Jain , Carnegie Mellon University, Pittsburgh, PA
Randal E. Bryant , Carnegie Mellon University, Pittsburgh, PA
pp. 161
Manish Pandey , Science, Carnegie Mellon University Pittsburgh, PA
Richard Raimi , Motorola Inc., Austin, TX
Randal E. Bryant , Science, Carnegie Mellon University Pittsburgh, PA
Magdy S. Abadir , Motorola Inc., Austin, TX
pp. 167
Jae-Young Jang , University of Colorado, Boulder
Shaz Qadeer , University of California, Berkeley
Matt Kaufmann , Motorola Inc., Austin, TX
Carl Pixley , Motorola Inc., Austin, TX
pp. 173
Session 10: System-Level Exploration and Refinement
James A. Rowson , Alta Group of Cadence Design Systems Inc.
Alberto Sangiovanni-Vincentelli , University of California at Berkeley
pp. 178
Robert H. Klenke , University of Virginia, Charlottesville
Moshe Meyassed , University of Virginia, Charlottesville
James H. Aylor , University of Virginia, Charlottesville
Barry W. Johnson , University of Virginia, Charlottesville
Ramesh Rao , University of Virginia, Charlottesville
Anup Ghosh , University of Virginia, Charlottesville
pp. 184
Ole Bentz , Silicon Graphics, Inc., Mountain View, CA
Jan M. Rabaey , University of California, Berkeley, CA
David Lidsky , University of California, Berkeley, CA
pp. 190
Session 11: Binary Decision Diagrams
Srilatha Manne , University of Colorado, Boulder
Dirk Grunwald , University of Colorado, Boulder
Fabio Somenzi , University of Colorado, Boulder
pp. 196
Christoph Meinel , Universit?t Trier, Germany
Fabio Somenzi , University of Colorado at Boulder
Thorsten Theobald , Universit?t Trier, Germany
pp. 202
Youpyo Hong , University of Southern California, Los Angeles
Peter A. Beerel , University of Southern California, Los Angeles
Jerry R. Burch , Cadence Berkeley Laboratories, Berkeley, CA
Kenneth L. McMillan , Cadence Berkeley Laboratories, Berkeley, CA
pp. 208
Session 12: Timing Analysis
Yuji Kukimoto , University of California, Berkeley, CA
Robert K. Brayton , University of California, Berkeley, CA
pp. 220
Tod Amon , Southwest Texas State University, San Marcos, TX
Gaetano Borriello , University of Washington, Seattle
Taokuan Hu , Southwest Texas State University, San Marcos, TX
Jiwen Liu , Southwest Texas State University, San Marcos, TX
pp. 226
Session 13: Embedded Tutorial
Peter Marwedel , Universit?t Dortmund, Germany
pp. 232
Session 14: Panel
Session 15: System-Level Optimization and Verification
Ajay J. Daga , Interconnectix, a Mentor Graphics Business, Portland, OR
Peter R. Suaris , Interconnectix, a Mentor Graphics Business, Portland, OR
pp. 240
Barry Shackleford , Hewlett-Packard Laboratories, Palo Alto, CA; Mitsubishi Electric Company, Yokohama, Japan
Mitsuhiro Yasuda , Mitsubishi Electric Company, Yokohama, Japan
Etsuko Okushi , Mitsubishi Electric Company, Yokohama, Japan
Hisao Koizumi , Mitsubishi Electric Company, Yokohama, Japan
Hiroyuki Tomiyama , Kyushu University, Kasuga-shi, Japan
Hiroto Yasuura , Kyushu University, Kasuga-shi, Japan
pp. 246
Miodrag Potkonjak , University of California, Los Angeles
Kyosun Kim , University of Massachusetts, Amherst
Ramesh Karri , University of Massachusetts, Amherst
pp. 252
Session 16: Formal Verification
R. P. Kurshan , Bell Laboratories, Murray Hill, NJ
pp. 258
Andreas Kuehlmann , IBM Thomas J. Watson Research Center, Yorktown Heights, NY
Florian Krohm , IBM Thomas J. Watson Research Center, Yorktown Heights, NY
pp. 263
Session 17: Analog Simulation
Michael W. Tian , University of Iowa, Iowa City
C.-J. Richard Shi , University of Iowa, Iowa City
pp. 275
S. Mir , Instituto de Microelectr?nica de Sevilla, Sevilla, Spain
A. Rueda , Instituto de Microelectr?nica de Sevilla, Sevilla, Spain
T. Olbrich , AMS - Austria Mikro Systeme Int. AG, Austria
E. Peral?as , Instituto de Microelectr?nica de Sevilla, Sevilla, Spain
J. L. Huertas , Instituto de Microelectr?nica de Sevilla, Sevilla, Spain
pp. 281
Session 18: Software Synthesis for Embedded Systems
Markus Willems , Aachen University of Technology, Germany
Volker B?rsgens , Aachen University of Technology, Germany
Holger Keding , Aachen University of Technology, Germany
Thorsten Gr?tker , Aachen University of Technology, Germany
Heinrich Meyr , Aachen University of Technology, Germany
pp. 293
George Hadjiyiannis , Department of EECS, MIT
Silvina Hanono , Department of EECS, MIT
Srinivas Devadas , Department of EECS, MIT
pp. 299
Mark R. Hartoog , Alta Group of Cadence Design Systems, Inc.
James A. Rowson , Alta Group of Cadence Design Systems, Inc.
Prakash D. Reddy , Alta Group of Cadence Design Systems, Inc.
Soumya Desai , Alta Group of Cadence Design Systems, Inc.
Douglas D. Dunlop , Alta Group of Cadence Design Systems, Inc.
Edwin A. Harcourt , Alta Group of Cadence Design Systems, Inc.
Neeti Khullar , Alta Group of Cadence Design Systems, Inc.
pp. 303
Session 19: Experiences in System Design and Education at Universities
H. De Man , Katholieke Universiteit Leuven/IMEC, Belgium
pp. 307
Robert Brodersen , Dept. of EECS University of California, Berkeley
pp. 313
Asim Smailagic , Carnegie Mellon University, Pittsburgh, PA
Daniel P. Siewiorek , Carnegie Mellon University, Pittsburgh, PA
Richard Martin , Carnegie Mellon University, Pittsburgh, PA
John Stivoric , Carnegie Mellon University, Pittsburgh, PA
pp. 315
Session 20: Standard Cell and Physical Design Methods
H. T. Heineken , Level One Communications, Sacramento, CA
J. Khare , Level One Communications, Sacramento, CA
W. Maly , Carnegie Mellon University, Pittsburgh, PA
P. K. Nag , Carnegie Mellon University, Pittsburgh, PA
C. Ouyang , Carnegie Mellon University, Pittsburgh, PA
W. A. Pleskacz , Warsaw University of Technology, Poland
pp. 321
Mohan Guruswamy , Motorola, Inc., Austin, Texas
Robert L. Maziasz , Motorola, Inc., Austin, Texas
Daniel Dulitz , Motorola, Inc., Austin, Texas
Srilata Raman , Motorola, Inc., Austin, Texas
Venkat Chiluvuri , Motorola, Inc., Austin, Texas
Andrea Fernandez , Motorola, Inc., Austin, Texas
Larry G. Jones , Motorola, Inc., Austin, Texas
pp. 327
Donald G. Baltus , LSI Logic Corporation
Thomas Varga , LSI Logic Corporation
Robert C. Armstrong , LSI Logic Corporation
John Duh , Mentor Graphics Corporation
T. G. Matheson , Mentor Graphics Corporation
pp. 333
John F. Croix , Advanced Micro Devices, Inc., Austin, TX
D. F. Wong , The University of Texas at Austin
pp. 337
Session 21: Modeling and Transformations in Synthesis
Jian Li , University of Illinois, Urbana-Champaign
Rajesh K. Gupta , University of California, Irvine
pp. 341
Inki Hong , UCLA Computer Science Department, Los Angeles, CA
Darko Kirovski , UCLA Computer Science Department, Los Angeles, CA
Miodrag Potkonjak , UCLA Computer Science Department, Los Angeles, CA
pp. 347
Kyosun Kim , University of Massachusetts, Amherst
Ramesh Karri , University of Massachusetts, Amherst
Miodrag Potkonjak , University of California, Los Angeles
pp. 353
Jeffrey Walrath , University of Cincinnati, Ohio
Ranga Vemuri , University of Cincinnati, Ohio
pp. 359
Session 22: Statistical Power Estimation Techniques
Subodh Gupta , University of Illinois at Urbana-Champaign
Farid N. Najm , University of Illinois at Urbana-Champaign
pp. 365
Chih-Shun Ding , Rockwell International Corporation, Newport Beach, CA
Qing Wu , University of Southern California, Los Angeles, CA
Cheng-Ta Hsieh , University of Southern California, Los Angeles, CA
Massoud Pedram , University of Southern California, Los Angeles, CA
pp. 371
Li-Pen Yuan , Univ. of Illinois at Urbana-Champaign
Chin-Chi Teng , Avant! Corporation, Sunnyvale, CA
Sung-Mo Kang , Univ. of Illinois at Urbana-Champaign
pp. 377
Angela Krstic , University of California, Santa Barbara
Kwang-Ting (Tim) Cheng , University of California, Santa Barbara
pp. 383
Session 23: Co-Simulation
Claudio Passerone , Politecnico di Torino - Cadence Europeans Labs, Italy
Luciano Lavagno , Politecnico di Torino - Cadence Europeans Labs, Italy
Massimiliano Chiodo , Alta Group of Cadence Design Systems, USA
Alberto Sangiovanni-Vincentelli , University of California at Berkeley, USA
pp. 389
Ken Hines , University of Washington, Seattle
Gaetano Borriello , University of Washington, Seattle
pp. 395
Session 24: Panel
Session 25: Emerging Technologies and Architecture for Low Power
Pankaj Pant , Georgia Institute of Technology
Vivek De , Intel Corp., Hillsboro, OR
Abhijit Chatterjee , Georgia Institute of Technology
pp. 403
James Kao , Massachusetts Institute of Technology, Cambridge
Anantha Chandrakasan , Massachusetts Institute of Technology, Cambridge
Dimitri Antoniadis , Massachusetts Institute of Technology, Cambridge
pp. 409
Thucydides Xanthopoulos , Massachusetts Institute of Technology, Cambridge
Yoshifumi Yaoi , Massachusetts Institute of Technology, Cambridge
Anantha Chandrakasan , Massachusetts Institute of Technology, Cambridge
pp. 415
Chi-Ying Tsui , Hong Kong Univ. of Science and Technology, Clear Water Bay, H.K.
Kai-Keung Chan , Hong Kong Univ. of Science and Technology, Clear Water Bay, H.K.
Qing Wu , University of Southern California, Los Angeles, CA
Chih-Shun Ding , University of Southern California, Los Angeles, CA
Massoud Pedram , University of Southern California, Los Angeles, CA
pp. 421
Qi Wang , University of Arizona. Tucson, AZ
Sarma B. K. Vrudhula , University of Arizona. Tucson, AZ
Shantanu Ganguly , Motorola Inc., Austin, TX
pp. 425
Session 26: High Level Synthesis for Low Power
Anand Raghunathan , Princeton University, NJ
Sujit Dey , NEC USA, Princeton, NJ
Niraj K. Jhay , Princeton University, NJ
Kazutoshi Wakabayashi , NEC Corp., Tokyo, Japan
pp. 429
Catherine H. Gebotys , University of Waterloo, Canada
pp. 435
Daehong Kim , Seoul National University, Korea
Kiyoung Choi , Seoul National University, Korea
pp. 441
Session 27: Module Generation
Martin Lefebvre , Cadabra Design Libraries Inc., Nepean, Ont.
David Marple , Synopsys Inc., Mountain View, CA
Carl Sechen , University of Washington, Seattle, WA
pp. 446
Avaneendra Gupta , University of Michigan, Ann Arbor; Intel Corporation, Santa Clara, CA
John P. Hayes , University of Michigan, Ann Arbor
pp. 452
Jaewon Kim , Quickturn Design Systems, Inc., Mountain View, CA
S. M. Kang , University of Illinois at Urbana-Champaign
pp. 456
John Lakos , Mentor Graphics Corporation, Warren, NJ
pp. 460
Session 28: BIST and DFT
Douglas Chang , Univ. of Calif., Santa Barbara
Mike Tien-Chien Lee , Avant! Corp., Sunnyvale, CA
Malgorzata Marek-Sadowska , Univ. of Calif., Santa Barbara
Takashi Aikyo , Fujitsu Limited, Japan
Kwang-Ting Cheng , Univ. of Calif., Santa Barbara
pp. 466
K. H. Tsai , University of California, Santa Barbara
S. Hellebrand , University of Siegen, Germany
J. Rajski , Mentor Graphics Corporation, Wilsonville, OR
M. Marek-Sadowska , University of California, Santa Barbara
pp. 472
Huan-Chih Tsai , University of California, Santa Barbara
Kwang-Ting Cheng , University of California, Santa Barbara
Chih-Jen Lin , Intel Corporation, Hillsboro, OR
Sudipta Bhawmik , Lucent Technologies, Princeton, NJ
pp. 478
Session 29: Panel
Session 30: DSP & Telecommunication System Design
Wolfgang Meyer , Synopsys, Inc., Mountain View, CA
Andrew Seawright , Synopsys, Inc., Mountain View, CA
Fumiya Tada , Hitachi, Ltd., Japan
pp. 486
C. Hein , Lockheed Martin Advanced Technology Laboratories, Camden, NJ
J. Pridgen , Lockheed Martin Advanced Technology Laboratories, Camden, NJ
W. Kline , Lockheed Martin Advanced Technology Laboratories, Camden, NJ
pp. 492
Claus Schneider , Siemens AG, Corporate Technology, Munich
pp. 498
Session 31: Embedded Tutorial
Enrico Macii , Politecnico di Torino, Italy
Massoud Pedram , University of Southern California, Los Angeles
Fabio Somenzi , University of Colorado, Boulder
pp. 504
Session 32: Advances in Partitioning
Ming-Ter Kuo , Aptix Corporation, San Jose, CA
Chung-Kuan Cheng , University of California, San Diego
pp. 512
Wen-Jong Fang , Tsing Hua University, Taiwan
Allen C.-H. Wu , Tsing Hua University, Taiwan
pp. 518
Helena Krupnova , Institut National Polytechnique de Grenoble / CSI, France
Ali Abbara , Institut National Polytechnique de Grenoble / CSI, France
Gabri?le Saucier , Institut National Polytechnique de Grenoble / CSI, France
pp. 522
George Karypis , University of Minnesota, Minneapolis
Rajat Aggarwal , University of Minnesota, Minneapolis
Vipin Kumar , University of Minnesota, Minneapolis
Shashi Shekhar , University of Minnesota, Minneapolis
pp. 526
Charles J. Alpert , IBM Austin Research Laboratory, Austin, TX
Jen-Hsin Huang , Synopsys, Inc., Mountain View, CA
Andrew B. Kahng , Cadence Design Systems, Inc., San Jose, CA
pp. 530
Session 33: Processor Test Techniques
Indradeep Ghosh , Princeton University, NJ
Anand Raghunathan , Princeton University, NJ
Niraj K. Jha , Princeton University, NJ
pp. 534
Laurence Goodby , Hewlett-Packard Company, Palo Alto, CA
Alex Orailoglu , University of California, San Diego
pp. 540
M. Nourani , University of Tehran, Iran
J. Carletta , Case Western Reserve University, Ohio
C. Papachristou , Case Western Reserve University, Ohio
pp. 546
Session 34: Panel
pp. 552
Session 35: Design Processes and Frameworks
Hemang Lavana , NC State University, Raleigh
Amit Khetawat , NC State University, Raleigh
Franc Brglez , NC State University, Raleigh
Krzysztof Kozminski , National Semiconductor Corp., Santa Clara, CA
pp. 553
Donald R. Cottrell , CFI, Inc., Austin, TX
pp. 559
Bernd Sch?rmann , University of Kaiserslautern, Germany
Joachim Altmeyer , University of Kaiserslautern, Germany
pp. 564
Session 36: Probabilistic Models of Input Data for Efficient Power Estimation
Radu Marculescu , University of Southern California, Los Angeles
Diana Marculescu , University of Southern California, Los Angeles
Massoud Pedram , University of Southern California, Los Angeles
pp. 570
Cheng-Ta Hsieh , University of Southern California, Los Angeles
Massoud Pedram , University of Southern California, Los Angeles
Gaurav Mehta , Intel Corporation, Santa Clara, CA
Fred Rastgar , Intel Corporation, Santa Clara, CA
pp. 576
Sumant Ramprasad , University of Illinois at Urbana-Champaign
Naresh R. Shanbhag , University of Illinois at Urbana-Champaign
Ibrahim N. Hajj , University of Illinois at Urbana-Champaign
pp. 582
Session 37: Hot Topics in Routing
Charles Alpert , IBM Austin Research Laboratory, Austin, TX
Anirudh Devgan , IBM Austin Research Laboratory, Austin, TX
pp. 588
Andrew B. Kahng , Cadence Design Systems, Inc., San Jose, CA
C.-W. Albert Tsao , Cadence Design Systems, Inc., San Jose, CA
pp. 594
Chin-Chih Chang , University of California, Los Angeles
Jason Cong , University of California, Los Angeles
pp. 600
Chung-Ping Chen , University of Texas, Austin
D. F. Wong , University of Texas, Austin
pp. 604
Session 38: Test Generation and Fault Simulation
Irith Pomeranz , University of Iowa, Iowa City
Sudhakar M. Reddy , University of Iowa, Iowa City
pp. 608
Seongmoon Wang , University of Southern California, Los Angeles
Sandeep K. Gupta , University of Southern California, Los Angeles
pp. 614
Oriol Roig , Universitat Polit?cnica de Catalunya, Spain
Jordi Cortadella , Universitat Polit?cnica de Catalunya, Spain
Marco A. Pe? , Universitat Polit?cnica de Catalunya, Spain
Enric Pastor , Universitat Polit?cnica de Catalunya, Spain
pp. 620
Session 39: Panel
Session 40: Deep Submicron Modeling and Analysis
Jason Cong , UCLA, Los Angeles, CA
Lei He , UCLA, Los Angeles, CA
Andrew B. Kahng , Cadence Design Systems, Inc., San Jose, CA
David Noice , Cadence Design Systems, Inc., San Jose, CA
Nagesh Shirali , Cadence Design Systems, Inc., San Jose, CA
Steve H.-C. Yen , Cadence Design Systems, Inc., San Jose, CA
pp. 627
Cristiano Forzan , SGS-THOMSON Microelectronics, Italy
Bruno Franzini , SGS-THOMSON Microelectronics, Italy
Carlo Guardiani , SGS-THOMSON Microelectronics, Italy
pp. 633
Howard H. Chen , Thomas J. Watson Research Center, Yorktown Heights, NY
David D. Ling , Thomas J. Watson Research Center, Yorktown Heights, NY
pp. 638
Session 41: Technology-Dependent Optimization for Performance and Power
Jason Cong , University of California, Los Angeles
Chang Wu , University of California, Los Angeles
pp. 644
Rajendran Panda , Motorola, Inc., Austin, TX
Farid N. Najm , University of Illinois at Urbana-Champaign
pp. 650
Chau-Shen Chen , Tsing Hua University, Hsin-Chu, Taiwan
TingTing Hwang , Tsing Hua University, Hsin-Chu, Taiwan
C. L. Liu , Univ. of Illinois at Urbana-Champaign
pp. 656
Yi-Min Jiang , University of California, Santa Barbara
Angela Krstic , University of California, Santa Barbara
Kwang-Ting Cheng , University of California, Santa Barbara
Malgorzata Marek-Sadowska , University of California, Santa Barbara
pp. 662
Masako Murofushi , Semiconductor DA & TEST Engineering Center, Kawasaki, Japan
Takashi Ishioka , Semiconductor DA & TEST Engineering Center, Kawasaki, Japan
Masami Murakata , Semiconductor DA & TEST Engineering Center, Kawasaki, Japan
Takashi Mitsuhashi , Semiconductor DA & TEST Engineering Center, Kawasaki, Japan
pp. 666
Session 42: CAD Issues for Micro-Electro-Mechanical Systems
William C. Tang , MEMS Technology Group, Pasadena, California
pp. 670
J. M. Karam , TIMA Lab., France
B. Courtois , TIMA Lab., France
H. Boutamine , TIMA Lab., France
P. Drake , Mentor Graphics, UK
A. Poppe , Technical University of Budapest, Hungary
V. Szekely , Technical University of Budapest, Hungary
M. Renez , Technical University of Budapest, Hungary
K. Hofmann , Darmstadt University of Technology, Germany
M. Glesner , Darmstadt University of Technology, Germany
pp. 674
Tamal Mukherjee , Carnegie Mellon University, Pittsburgh, PA
Gary K. Fedder , Carnegie Mellon University, Pittsburgh, PA
pp. 680
N. Aluru , Massachusetts Institute of Technology, Cambridge, MA
J. White , Massachusetts Institute of Technology, Cambridge, MA
pp. 686
Session 43: Hardware/Software Partitioning
J? Henkel , NEC USA, Princeton, NJ
Rolf Ernst , Technische Universit?t Braunschweig, Germany
pp. 691
Darko Kirovski , University of California, Los Angeles
Miodrag Potkonjak , University of California, Los Angeles
pp. 697
Bharat P. Dave , Princeton University, NJ
Ganesh Lakshminarayana , Princeton University, NJ
Niraj K. Jha , Princeton University, NJ
pp. 703
Samir Agrawal , Synopsys, Inc., Mountain View, CA
Rajesh K. Gupta , University of California, Irvine
pp. 709
Smita Bakshi , University of California, Davis
Daniel D. Gajski , University of California, Irvine
pp. 713
Session 44: Embedded Tutorial
Wayne W.-M. Dai , University of California at Santa Cruz
pp. 717
Panel
Session 45: Designing High Performance and Low Power Microprocessors Using Full Custom Techniques
William J. Grundmann , Digital Semiconductor, Hudson, MA
Dan Dobberpuhl , Digital Semiconductor, Palo Alto, CA
Randy L. Allmon , Digital Semiconductor, Hudson, MA
Nicholas L. Rethman , Digital Semiconductor, Hudson, MA
pp. 722
Session 46: Formal Verification Techniques
Gianpiero Cabodi , Politecnico di Torino, Italy
Paolo Camurati , Universit? di Udine, Italy
Luciano Lavagno , Politecnico di Torino, Italy
Stefano Quer , Politecnico di Torino, Italy
pp. 728
Gagan Hasteer , University of Illinois, Urbana
Anmol Mathur , Silicon Graphics, Mountain View, CA
Prithviraj Banerjee , Northwestern University, Evanston, IL
pp. 734
Aarti Gupta , CCRL, NEC USA, Princeton, NJ
Sharad Malik , Princeton University, NJ
Pranav Ashar , CCRL, NEC USA, Princeton, NJ
pp. 740
Session 47: Placement Techniques
Jens Vygen , University of Bonn, Germany
pp. 746
C. J. Alpert , IBM Austin Research Laboratory, Austin, TX
T. Chan , UCLA Mathematics Dept., Los Angeles, CA
D. J.-H. Huang , UCLA Computer Science Dept., Los Angeles, CA
I. Markov , UCLA Mathematics Dept., Los Angeles, CA
K. Yan , UCLA Computer Science Dept., Los Angeles, CA
pp. 752
Majid Saraafzadeh , Northwestern University, Evanston, IL
David Knol , Northwestern University, Evanston, IL
Gustavo Tellez , Northwestern University, Evanston, IL
pp. 758
Jin Xu , University of California, San Diego
Pei-Ning Guo , University of California, San Diego
Chung-Kuan Cheng , University of California, San Diego
pp. 762
Session 48: Panel
Session 49: Heterogeneous System Analysis
S. P. Levitan , University of Pittsburgh
P. J. Marchand , University of California, San Diego
T. P. Kurzweg , University of Pittsburgh
M. A. Rempel , University of Pittsburgh
D. M. Chiarulli , University of Pittsburgh
C. Fan , University of California, San Diego
F. B. McCormick , University of California, San Diego
pp. 768
Matthias Bauer , Siemens AG, Corporate Technology, Munich
Wolfgang Ecker , Siemens AG, Corporate Technology, Munich
pp. 774
Clifford Liem , Central Ramp;D, SGS-Thomson Microelectronics, France; Laboratoire TIMA, L'Insitut National Polytechnique de Grenoble, France
Marco Cornero , Central Ramp;D, SGS-Thomson Microelectronics, France
Miguel Santana , Central Ramp;D, SGS-Thomson Microelectronics, France
Pierre Paulin , Central Ramp;D, SGS-Thomson Microelectronics, France
Ahmed Jerraya , Laboratoire TIMA, L'Insitut National Polytechnique de Grenoble, France
Jean-Marc Gentit , Thomson Consumer Electronic Components, France
Jean Lopez , Thomson Consumer Electronic Components, France
Xavier Figari , Thomson Consumer Electronic Components, France
Laurent Bergher , Thomson Consumer Electronic Components, France
pp. 780
Author Index (PDF)
pp. 786
5 ms
(Ver 2.0)

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