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2009 WRI World Congress on Computer Science and Information Engineering
Design of a Configurable and Extensible Tcore Processor Based on Transport Triggered Architecture
Los Angeles, California USA
March 31-April 02
ISBN: 978-0-7695-3507-4
A hardware design of a configurable and extensible processor named Tcore, which is based on transport triggered architecture (TTA), is presented in this paper.  Due to its flexibility, the Tcore can be used as an application specific processor, especially as a coprocessor for different DSP applications. We have configured Tcore to an instruction level parallel processor to support the application of MP3 IMDCT in a SoC and have been fully verified on FPGA. The results show the advantage of using this configurable processor in terms of performance in computation, flexibility in application, limited effort in design and reduction on silicon area.
Index Terms:
SoC, Transport Triggered Architecture, configurable and extensible processor, MP3, IMDCT
Citation:
Wei Guo, Jizeng Wei, Yongbin Yao, Zaifeng Shi, Su Wang, "Design of a Configurable and Extensible Tcore Processor Based on Transport Triggered Architecture," csie, vol. 3, pp.536-540, 2009 WRI World Congress on Computer Science and Information Engineering, 2009
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