The Community for Technology Leaders
RSS Icon
Subscribe
Los Angeles, CA
March 31, 2009 to April 2, 2009
ISBN: 978-0-7695-3507-4
pp: 536-540
ABSTRACT
A hardware design of a configurable and extensible processor named Tcore, which is based on transport triggered architecture (TTA), is presented in this paper.  Due to its flexibility, the Tcore can be used as an application specific processor, especially as a coprocessor for different DSP applications. We have configured Tcore to an instruction level parallel processor to support the application of MP3 IMDCT in a SoC and have been fully verified on FPGA. The results show the advantage of using this configurable processor in terms of performance in computation, flexibility in application, limited effort in design and reduction on silicon area.
INDEX TERMS
SoC, Transport Triggered Architecture, configurable and extensible processor, MP3, IMDCT
CITATION
Jizeng Wei, Yongbin Yao, Zaifeng Shi, Su Wang, "Design of a Configurable and Extensible Tcore Processor Based on Transport Triggered Architecture", CSIE, 2009, 2009 WRI World Congress on Computer Science and Information Engineering, CSIE, 2009 WRI World Congress on Computer Science and Information Engineering, CSIE 2009, pp. 536-540, doi:10.1109/CSIE.2009.233
6 ms
(Ver 2.0)

Marketing Automation Platform Marketing Automation Tool