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Los Angeles, CA
March 31, 2009 to April 2, 2009
ISBN: 978-0-7695-3507-4
pp: 530-535
ABSTRACT
Speculative Multithreading (SpMT) increases the performance by means of executing multiple threads speculatively to exploit thread-level parallelism. By combining software and hardware approaches, we have improved the capabilities of previous WaveScalar ISA on the basis of Transactional Memory system for the WaveCache Architecture. Threads are extracted at the course of static compiling, and speculatively executed as a thread-level transaction that is supported by extra hardware components, such as Thread-Context-Table (TCT) and Thread-Memory-History (TMH). We have evaluated the SpMT WaveCache with 6 real benchmarks from SPEC, Mediabench and Mibench. On the whole, the SpMT WaveCache outperforms superscalar architecture ranging from 2X to 3X, and great performance gains are achieved over original WaveCache and Transactional WaveCache as well.
CITATION
Songwen Pei, Baifeng Wu, Min Du, Gang Chen, Leandro A.J. Marzulo, Felipe M.G. Franca, "SpMT WaveCache: Exploiting Thread-Level Parallelism in WaveScalar", CSIE, 2009, 2009 WRI World Congress on Computer Science and Information Engineering, CSIE, 2009 WRI World Congress on Computer Science and Information Engineering, CSIE 2009, pp. 530-535, doi:10.1109/CSIE.2009.35
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