The Community for Technology Leaders
RSS Icon
Subscribe
Los Angeles, CA
March 31, 2009 to April 2, 2009
ISBN: 978-0-7695-3507-4
pp: 440-443
ABSTRACT
With a widespread development of SoC technology and universal application of USB protocol, embedded USB device controller IP core has become more and more important in chip design. Based on the WISHBONE on-chip bus by OpenCores organization maintaining, the paper designs USB2.0 device controller IP soft-core which accords with USB2.0 protocol. Through the simulation verification and the logic synthesis, the IP soft-core accords with USB2.0’s data norms, data flow and related event detection, can be flexibly applied to various embedded environment.
INDEX TERMS
SoC, WISHBONE Bus, USB2.0 Device controller, IP Soft-Core
CITATION
Wang Ziting, Xu Lei, Li Panfeng, Geng Wenbo, "Design of USB2.0 Device Controller IP Soft-Core Based on SoC Technology and WISHBONE Bus", CSIE, 2009, 2009 WRI World Congress on Computer Science and Information Engineering, CSIE, 2009 WRI World Congress on Computer Science and Information Engineering, CSIE 2009, pp. 440-443, doi:10.1109/CSIE.2009.159
6 ms
(Ver 2.0)

Marketing Automation Platform Marketing Automation Tool