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2009 WRI World Congress on Computer Science and Information Engineering
Design of USB2.0 Device Controller IP Soft-Core Based on SoC Technology and WISHBONE Bus
Los Angeles, California USA
March 31-April 02
ISBN: 978-0-7695-3507-4
With a widespread development of SoC technology and universal application of USB protocol, embedded USB device controller IP core has become more and more important in chip design. Based on the WISHBONE on-chip bus by OpenCores organization maintaining, the paper designs USB2.0 device controller IP soft-core which accords with USB2.0 protocol. Through the simulation verification and the logic synthesis, the IP soft-core accords with USB2.0’s data norms, data flow and related event detection, can be flexibly applied to various embedded environment.
Index Terms:
SoC, WISHBONE Bus, USB2.0 Device controller, IP Soft-Core
Citation:
Wang Ziting, Xu Lei, Li Panfeng, Geng Wenbo, "Design of USB2.0 Device Controller IP Soft-Core Based on SoC Technology and WISHBONE Bus," csie, vol. 3, pp.440-443, 2009 WRI World Congress on Computer Science and Information Engineering, 2009
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