Los Angeles, CA
March 31, 2009 to April 2, 2009
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/CSIE.2009.693
As power consumption of the cache memory in modern processor designs tends to dominate, measures must be taken to keep it under control. This paper introduces an approach for reducing instruction cache power based on the operation of a local access control scheme added in the cache system. The average saving on the power consumption of the instruction cache could be up to 23% compared with the traditional instruction cache structure.
cache, power, locality, processor
Ming Yang, Heping Peng, "Energy Efficient Instruction Cache with Local Access Scheme", CSIE, 2009, 2009 WRI World Congress on Computer Science and Information Engineering, CSIE, 2009 WRI World Congress on Computer Science and Information Engineering, CSIE 2009, pp. 418-422, doi:10.1109/CSIE.2009.693