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10th International Workshop on Hardware/Software Co-Design (CODES'02)
Estes Park, Colorado
May 06-May 08
ISBN: 1-58113-542-4
Table of Contents
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Session 1: Advances in System Specification and System Design Frameworks
Brian Grattan, University of Califomia, Riverside
Greg Stitt, University of Califomia, Riverside
Frank Vahid, University of Califomia, Riverside; UC Irvine
pp. 1
Todor Stefanov, Leiden University, The Netherlands
Bart Kienhuis, Leiden University, The Netherlands
Ed Deprettere, Leiden University, The Netherlands
pp. 7
Felice Balarin, Cadence Berkeley Labs, CA
Luciano Lavagno, Cadence Berkeley Labs, CA
Claudio Passerone, Politecnico di Torino, Italy
Alberto Sangiovanni-Vincentelli, University of California, Berkeley
Yosinori Watanabe, Cadence Berkeley Labs, CA
Guang Yang, University of Massachusetts, Amherst
pp. 13
JoAnn M. Paul, Carnegie Mellon University, Pittsburgh, PA
Christopher M. Eatedali, Carnegie Mellon University, Pittsburgh, PA
Donald E. Thomas, Carnegie Mellon University, Pittsburgh, PA
pp. 19
Dag Bj?rklund, Turku Centre for Computer Science (TUCS), Finland
Johan Lilius, Turku Centre for Computer Science (TUCS), Finland
pp. 25
Session 2: System Design Methods: Analysis and Verification
Per Bjur?us, Saab Avionics, Sweden
Mikael Millberg, Royal Institute of Technology, Sweden
Axel Jantsch, Royal Institute of Technology, Sweden
pp. 31
A. Siebenborn, FZI Forschungszentrum Informatik, Germany
O. Bringmann, FZI Forschungszentrum Informatik, Germany
W. Rosenstiel, Universit?t T?bingen, Germany
pp. 37
Mauricio Varea, University of Southampton, UK
Bashir M. Al-Hashimi, University of Southampton, UK
Luis A. Cort?, Link?ping University, Sweden
Petru Eles, Link?ping University, Sweden
Zebo Peng, Link?ping University, Sweden
pp. 43
G. D. Nagendra, Texas Instruments India Ltd., Bangalore, India
V. G. Prem Kumar, Texas Instruments India Ltd., Bangalore, India
B. S. Sheshadri Chakravarthy, Texas Instruments India Ltd., Bangalore, India
pp. 49
Session 3: Design Space Exploration and Architectural Design of HW/SW Systems
Donatella Sciuto, Politecnico di Milano, Italy
Fabio Salice, Politecnico di Milano, Italy
Luigi Pomante, Politecnico di Milano, Italy
William Fornaciari, Politecnico di Milano, Italy
pp. 55
Juha-Pekka Soininen, VTT Electronics, Oulu, Finland
Jari Kreku, VTT Electronics, Oulu, Finland
Yang Qu, VTT Electronics, Oulu, Finland
Martti Forsell, VTT Electronics, Oulu, Finland
pp. 61
Rajeshwari Banakar, Indian Institute of Technology, Delhi
Stefan Steinke, University of Dortmund, Germany
Bo-Sik Lee, University of Dortmund, Germany
M. Balakrishnan, Indian Institute of Technology, Delhi
Peter Marwedel, University of Dortmund, Germany
pp. 73
Abdenour Azzedine, Universit? de Bretagne SUD, France
Jean-Philippe Diguet, Universit? de Bretagne SUD, France
Jean-Luc Philippe, Universit? de Bretagne SUD, France
pp. 85
Session 4: Co-Design Architecture and Synthesis
Jeffry T. Russell, University of Texas at Austin
pp. 91
T. Vinod Kumar Gupta, University of Maryland, College Park
Roberto E. Ko, Cornell University, Ithaca, NY
Rajeev Barua, University of Maryland, College Park
pp. 97
Christian Kreiner, Graz University of Technology, Austriaj
Christian Steger, Graz University of Technology, Austriaj
Egon Teiniker, Graz University of Technology, Austriaj
Reinhold Weiss, Graz University of Technology, Austriaj
pp. 109
Session 5: System Partitioning and Timing Analysis
Marek Jersak, Technical University of Braunschweig, Germany
Kai Richter, Technical University of Braunschweig, Germany
Rafik Henia, Technical University of Braunschweig, Germany
Rolf Ernst, Technical University of Braunschweig, Germany
Frank Slomka, University of Paderborn, Germany
pp. 121
Martijn J. Rutten, Philips Research Laboratories, The Netherlands
Jos. T. J. van Eijndhoven, Philips Research Laboratories, The Netherlands
Evert-Jan D. Pol, Philips Semiconductors, The Netherlands
pp. 139
Massimo Baleani, PARADES EEIG, Rome, Italy
Frank Gennari, University of California, Berkeley
Yunjian Jiang, University of California, Berkeley
Yatish Patel, University of California, Berkeley
Robert K. Brayton, University of California, Berkeley
Alberto Sangiovanni-Vincentelli, PARADES EEIG, Rome, Italy; University of California, Berkeley
pp. 151
Session 6: Energy Efficiency in System Design
G. Chen, Pennsylvania State University, University Park
M. Kandemir, Pennsylvania State University, University Park
N. Vijaykrishnan, Pennsylvania State University, University Park
M. J. Irwin, Pennsylvania State University, University Park
W. Wolf, Princeton University, NJ
pp. 163
Jinfeng Liu, University of California, Irvine
Pai H. Chou, University of California, Irvine
Nader Bagherzadeh, University of California, Irvine
pp. 169
Session 7: System Design Methods: Scheduling Advances
I. Kadayif, Pennsylvania State University, University Park
M. Kandemir, Pennsylvania State University, University Park
I. Kolcu, UMIST, Manchester, UK
G. Chen, Pennsylvania State University, University Park
pp. 193
Sunghyun Lee, Seoul National Univ., Korea
Sungjoo Yoo, SLS Group, TIMA Lab, France
Kiyoung Choi, Seoul National Univ., Korea
pp. 199
Rosa M. Badia, Technical University of Catalonia (UPC)
Juanjo Noguera, Hewlett-Packard InkJet Commercial Division (ICD)
pp. 205
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