• C
  • CODES-ISSS
  • 2005
  • Third IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS'05)
Advanced Search 
Third IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS'05)
Jersey City, NJ, USA
September 19-September 21
ISBN: 1-59593-161-9
Table of Contents
Tutorials
Michael Day, IBM Systems&Technology Group, Austin, TX
Peter Hofstee, IBM Systems&Technology Group, Austin, TX
pp. 1-1
Trevor Mudge, University of Michigan, Ann Arbor, MI
pp. 2-2
Keynote
Special Session 1: "Systems in 2010"
Jeff Welser, IBM, Rochester, MN
Charlie Johnson, IBM, Rochester, MN
pp. 4-6
Mayan Moudgill, Sandbridge Technologies, Inc., White Plains, NY
Michael Schulte, Sandbridge Technologies, Inc., White Plains, NY
Stamatis Vassiliadis, Sandbridge Technologies, Inc., White Plains, NY
Daniel Iancu, Sandbridge Technologies, Inc., White Plains, NY
Gary Nacer, Sandbridge Technologies, Inc., White Plains, NY
Michael Samori, Sandbridge Technologies, Inc., White Plains, NY
Sanjay Jintukar, Sandbridge Technologies, Inc., White Plains, NY
Stuart Stanley, Sandbridge Technologies, Inc., White Plains, NY
Tanuj Raja, Sandbridge Technologies, Inc., White Plains, NY
John Glossner, Sandbridge Technologies, Inc., White Plains, NY
pp. 7-12
Jonathan Wilmot, Goddard Space Flight Center, Greenbelt, MD
pp. 13-14
Session 2A: Innovative Synthesis Methodologies and Algorithms
Wolfgang Rosenstiel, Universit?t T?bingen, T?bingen, Germany
Axel Siebenborn, Microelectronic System Design, Karlsruhe, Germany
Oliver Bringmann, Microelectronic System Design, Karlsruhe, Germany
pp. 15-20
Daniel Gajski, University of California Irvine
Mehrdad Reshadi, University of California Irvine
pp. 21-26
John Lach, University of Virginia, Charlottesville, VA
Vinu Vijay Kumar, Texas Instruments, Stafford, TX
pp. 27-32
Session 2B: Software Controlled Memory Systems
Peter Petrov, University of Maryland, College Park, MD
Xiangrong Zhou, University of Maryland, College Park, MD
pp. 33-38
Richard Taylor, CriticalBlue Ltd, Edinburgh, UK
Barry O'Rourke, CriticalBlue Ltd, Edinburgh, UK
George Bruce, CriticalBlue Ltd, Edinburgh, UK
Japheth Hossell, CriticalBlue Ltd, Edinburgh, UK
Paul Morgan, CriticalBlue Ltd, Edinburgh, UK
pp. 39-44
Session 2C: Techniques for Code Generation, Partitioning and Analysis
Nikil Dutt, University of California Irvine, CA
Soonhoi Ha, Seoul National University, Seoul, Korea
Hyunok Oh, University of California Irvine, CA
pp. 51-56
Pieter van der Wolf, Philips Research, Eindhoven, The Netherlands
Jeffrey Kang, Philips Research, Eindhoven, The Netherlands
Tomas Henriksson, Philips Research, Eindhoven, The Netherlands
pp. 57-62
Kurt Keutzer, University of California, Berkeley
Scott J. Weber, University of California, Berkeley
pp. 63-68
Session 3A: Network-on-Chip Architectures
Radu Marculescu, Carnegie Mellon University, Pittsburgh, PA
Jingcao Hu, Carnegie Mellon University, Pittsburgh, PA
Umit Y. Ogras, Carnegie Mellon University, Pittsburgh, PA
pp. 69-74
Kees Goossens, Philips Research Laboratories, Eindhoven, The Netherlands
Andrei Radulescu, Philips Research Laboratories, Eindhoven, The Netherlands
Andreas Hansson, Lund University, Lund, Sweden
pp. 75-80
P. Marchal, IMEC vzw, Kapeldreef 75, Leuven, Belgium
D. Verkest, IMEC vzw, Kapeldreef 75, Leuven, Belgium
A. Shickova, IMEC vzw, Kapeldreef 75, Leuven, Belgium
F. Catthoor, IMEC vzw, Kapeldreef 75, Leuven, Belgium
F. Robert, IMEC vzw, Kapeldreef 75, Leuven, Belgium
A. Leroy, IMEC vzw, Kapeldreef 75, Leuven, Belgium
pp. 81-86
Session 3B: Memory Compression for Embedded Systems
Mahmut Kandemir, Pennsylvania State University
Mary Jane Irwin, Pennsylvania State University
Ozcan Ozturk, Pennsylvania State University
pp. 87-92
Haris Lekatsas, NEC Laboratories America, Princeton, NJ
Robert P. Dick, Northwestern University, Evanston, IL
Srimat Chakradhar, NEC Laboratories America, Princeton, NJ
Lei Yang, Northwestern University, Evanston, IL
pp. 93-98
Session 3C: Voltage Scaling and Variability Issues in System-Level Design
Margaret Martonosi, Princeton University, Princeton, NJ
Sharad Malik, Princeton University, Princeton, NJ
Fen Xie, Princeton University, Princeton, NJ
pp. 105-110
H. Wang, IMEC vzw, Leuven, Belgium
M. Miranda, IMEC vzw, Leuven, Belgium
F. Lobmaier, IMEC vzw, Leuven, Belgium
F. Catthoor, IMEC vzw, Leuven, Belgium
A. Papanikolaou, IMEC vzw, Leuven, Belgium
pp. 117-122
Panel 1
Patrick Lysaght, Xilinx Research
Peter Marwedel, University of Dortmund, Germany
Mike Muller, ARM, UK
Daniel Gajski, UC Irvine
David Goodwin, Tensilica
Grant Martin, Tensilica
pp. 123-123
Session 4A: Application Specific Architectures
Ghiath Alkadi, Philips Research, The Netherlands
Victor Reyes, University of Las Palmas GC, Spain
Bruno Steux, ?cole des Mines de Paris, France
Jorn J?chalsky, University of Hannover, Germany
Thomas Hinz, Philips Semiconductors Hamburg, Germany
Winfried Gehrke, Philips Semiconductors Hamburg, Germany
Wido Kruijtzer, Philips Research, The Netherlands
pp. 124-129
R. Chellappa, Princeton Univ., Princeton, NJ
S. S. Bhattacharyya, Princeton Univ., Princeton, NJ
S. Saha, Princeton Univ., Princeton, NJ
W. Wolf, Univ. of Maryland, College Park, MD
G. Aggarwal, Princeton Univ., Princeton, NJ
J. Schlessman, Univ. of Maryland, College Park, MD
V. Kianzad, Princeton Univ., Princeton, NJ
pp. 136-141
Session 4B: System-Level Power Estimation and Optimization
Vijay Narayanan, Pennsylvania State University, University Park, PA
Ing-Chao Lin, Pennsylvania State University, University Park, PA
Nagu Dhanwada, Hopewell Junction, NY
pp. 142-147
Alex Nicolau, University of California, Irvine, CA
Nikil Dutt, University of California, Irvine, CA
Eugene Earlie, Intel Corporation
Aviral Shrivastava, University of California, Irvine, CA
pp. 154-159
Session 5A: Accelerating Applications through Customized Instruction Sets
Mauricio Breternitz, Intel Labs, Clara, CA
Herbert Hum, Intel Labs, Clara, CA
Ramesh Peri, Intel Labs, Clara, CA
Jay Pickett, Intel Labs, Clara, CA
Youfeng Wu, Intel Labs, Clara, CA
pp. 160-165
Tulika Mitra, National University of Singapore, Republic of Singapore
Pan Yu, National University of Singapore, Republic of Singapore
pp. 166-171
Can ?zturan, Bogazici University, Turkey
G? D?, Bogazici University, Turkey
Kubilay Atasu, Bogazici University, Turkey
pp. 172-177
Session 5B: Security-Oriented Application Specific Architectures
Masaki Kondo, NEC Informatec Systems, Ltd. , Kanagawa, Japan
Masato Edahiro, NEC Corporation, Kanagawa, Japan
Akihisa Ikeno, NEC Informatec Systems, Ltd. , Kanagawa, Japan
Junji Sakai, NEC Corporation, Kanagawa, Japan
Hiroaki Inoue, NEC Corporation, Kanagawa, Japan
pp. 178-183
H. Vahedi, University of Guelph, Guelph, Canada
S. Gregori, University of Guelph, Guelph, Canada
Y. Zhanrong, University of Guelph, Guelph, Canada
R. Muresan, University of Guelph, Guelph, Canada
pp. 184-189
Anand Raghunathan, NEC Laboratories America, Princeton, NJ
Niraj K. Jha, Princeton University, Princeton, NJ
Srivaths Ravi, NEC Laboratories America, Princeton, NJ
Divya Arora, Princeton University, Princeton, NJ
pp. 190-195
Session 6: Special Session: "BioChips and BioInformatics"
Fei Su, Duke University, Durham, NC
Krishnendu Chakrabarty, Duke University, Durham, NC
pp. 201-206
Frank Suits, IBM Thomas J. Watson Research Center, Yorktown Heights, NY
Maria Eleftheriou, IBM Thomas J. Watson Research Center, Yorktown Heights, NY
Mark Giampapa, IBM Thomas J. Watson Research Center, Yorktown Heights, NY
Aleksandr Rayshubskiy, IBM Thomas J. Watson Research Center, Yorktown Heights, NY
Blake Fitch, IBM Thomas J. Watson Research Center, Yorktown Heights, NY
Michael C. Pitman, IBM Thomas J. Watson Research Center, Yorktown Heights, NY
T.J. Christopher Ward, IBM Hursley Park, Hursley, UK
Robert S. Germain, IBM Thomas J. Watson Research Center, Yorktown Heights, NY
pp. 207-212
Session 7A: High-Level Techniques for Specific Applications
James P. Davis, University of South Carolina, Columbia, SC
Duncan A. Buell, University of South Carolina, Columbia, SC
Siddhaveerasharan Devarkal, University of South Carolina, Columbia, SC
Gang Quan, University of South Carolina, Columbia, SC
pp. 213-218
Ramesh Karri, Polytechnic University, Brooklyn, NY
Bo Yang, Polytechnic University, Brooklyn, NY
pp. 219-224
Steven M. Nowick, Columbia University, New York, NY
E. G. Coffman, Columbia University, New York, NY
Peggy B. McGee, Columbia University, New York, NY
pp. 225-230
Session 7B: Memory Access and Virtualization Techniques for Performance
Seth Copen Goldstein, Carnegie Mellon University, Pittsburgh, PA
Tiberiu Chelcea, Carnegie Mellon University, Pittsburgh, PA
Tobias Bjerregaard, TU Denmark, Lyngby, Denmark
Girish Venkataramani, Carnegie Mellon University, Pittsburgh, PA
pp. 231-236
Prabhat Mishra, University of Florida, Gainesville, FL
Mehrdad Reshadi, University of California Irvine, Irvine, CA
pp. 237-242
Laura Pozzi, Ecole Polytechnique F?d?rale de Lausanne (EPFL), Lausanne, Switzerland
Paolo Ienne, Ecole Polytechnique F?d?rale de Lausanne (EPFL), Lausanne, Switzerland
Christophe Dubach, Ecole Polytechnique F?d?rale de Lausanne (EPFL), Lausanne, Switzerland
Miljan VuletiC, Ecole Polytechnique F?d?rale de Lausanne (EPFL), Lausanne, Switzerland
pp. 243-248
Session 8A: On-Chip Communication and Interface Design
Heinrich Meyr, RWTH Aachen University, Germany
Rainer Leupers, RWTH Aachen University, Germany
Achim Nohl, CoWare, Inc., CA
Gerd Ascheid, RWTH Aachen University, Germany
Tim Kogel, CoWare, Inc., CA
Tom Michiels, CoWare, Inc., CA
Andreas Wieferink, RWTH Aachen University, Germany
pp. 249-254
Andreas Gerstlauer, University of California, Irvine, CA
Daniel D. Gajski, University of California, Irvine, CA
Rainer D?mer, University of California, Irvine, CA
Dongwan Shin, University of California, Irvine, CA
pp. 255-260
Ahmed Amine Jerraya, TIMA Laboratory, CEDEX, France
Frederic Rousseau, TIMA Laboratory, CEDEX, France
Aimen Bouchhima, TIMA Laboratory, CEDEX, France
Mohamed-Wassim Youssef, TIMA Laboratory, CEDEX, France
Arnaud Grasset, TIMA Laboratory, CEDEX, France
Wander Cesario, TIMA Laboratory, CEDEX, France
Lobna Kriaa, TIMA Laboratory, CEDEX, France
Adriano Sarmento, TIMA Laboratory, CEDEX, France
pp. 261-266
Wido Kruijtzer, Philips Research Laboratories, The Netherlands
Gustavo Marrero, University of Las Palmas, Las Palmas GC, Spain
Antonio N?, University of Las Palmas, Las Palmas GC, Spain
Tom? Bautista, University of Las Palmas, Las Palmas GC, Spain
V?ctor Reyes, University of Las Palmas, Las Palmas GC, Spain
pp. 267-272
Session 8B: Algorithms and Methodologies for New Architectures
Kurt Keutzer, University of California at Berkeley, CA
Kaushik Ravindran, University of California at Berkeley, CA
Nadathur Satish, University of California at Berkeley, CA
Yujia Jin, University of California at Berkeley, CA
pp. 273-278
Andreas Herkersdorf, Munich University of Technology, Munich, Germany
Thomas Wild, Munich University of Technology, Munich, Germany
Rainer Ohlendorf, Munich University of Technology, Munich, Germany
pp. 279-284
Gordon McGregor, Freescale Semiconductor
Brian Einloth, Freescale Semiconductor
Frank Vahid, University of California, Riverside
Greg Stitt, University of California, Riverside
pp. 285-290
Session 9A: SW vs. HW Acceleration Techniques
Sri Parameswaran, University of New South Wales, Sydney, Australia
Newton Cheung, University of New South Wales, Sydney, Australia
Seng Lin Shee, University of New South Wales, Sydney, Australia
pp. 297-302
Manuel Prieto, Universidad Complutense, Madrid, Spain
Luis Pi?uel, Universidad Complutense, Madrid, Spain
F. Catthoor, Interuniversity MicroElectronic Center (IMEC), Leuven, Belgium
Francisco Tirado, Universidad Complutense, Madrid, Spain
Christian Tenllado, Universidad Complutense, Madrid, Spain
pp. 303-308
Zili Shao, University of Texas at Dallas
Edwin H.-M. Sha, University of Texas at Dallas
Meilin Liu, University of Texas at Dallas
Chun Xue, University of Texas at Dallas
pp. 309-314
Session 9B: Prototyping and Validation Techniques
Pai H. Chou, University of California, Irvine, CA
Qiang Xie, University of California, Irvine, CA
Jiwon Hahn, University of California, Irvine, CA
pp. 315-320
Rajesh Gupta, University of California, San Diego, CA
Brad Calder, University of California, San Diego, CA
Jeremy Lau, University of California, San Diego, CA
Cristiano Pereira, University of California, San Diego, CA
pp. 321-326
Panel 2
John Glossner, Sandbridge Technologies
Trevor Mudge, University of Michigan, Ann Arbor, MI
Wayne Wolf, Princeton University, Princeton, NJ
Chris Rowen, Tensilica
Feng Zhao, Microsoft Research
Janos Sztipanovits, Vanderbilt University
pp. 333-333
Erven Rohou, STMicroelectronics, Manno, Switzerland
Roberto Costa, STMicroelectronics, Manno, Switzerland
pp. 99-104
Usage of this product signifies your acceptance of the Terms of Use.