CSDL - Proceedings C

Message from the Program Chairs (PDF)

pp. xi

Organizing Committee (PDF)

pp. xii

Reviewers (PDF)

pp. xiv

Corporate Sponsors (PDF)

pp. xv

WORKSHOPS

ODES: 5th Workshop on Optimizations for DSP and Embedded Systems

Workshop on Data-Parallel Programming Models for Many-Core Architectures

EPIC-6: Workshop on EPIC Architectures and Compiler Technology

STMCS: Second Workshop on Software Tools for Multi-Core Systems

TUTORIALS

GCC Internals

Open64, The Open Source High Performance Compiler for Servers, Embedded Systems and Compiler/Architecture Research

Practical Phoenix: A Hands-On Tutorial

Keynotes

GPU Computing: Programming a Massively Parallel Processor (PDF)

Ian Buck, NVIDIA, GPU-Compute Software Manager

pp. 17

Parallel Programming Environment: A Key to Translating Tera-Scale Platforms into a Big Success (PDF)

Jesse Fang, Intel, Director of Programming Systems Lab

pp. 18

Transactions

Understanding Tradeoffs in Software Transactional Memory (Abstract)

Dave Dice, Sun Microsystems

Nir Shavit, Sun Microsystems and Tel-Aviv University

pp. 21-33

PDF

Code Generation and Optimization for Transactional Memory Constructs in an Unmanaged Language (Abstract)

Cheng Wang, Intel Corporation, Santa Clara, CA

Wei-Yu Chen, University of California, Berkeley

Youfeng Wu, Intel Corporation, Santa Clara, CA

Bratin Saha, Intel Corporation, Santa Clara, CA

Ali-Reza Adl-Tabatabai, Intel Corporation, Santa Clara, CA

pp. 34-48

PDF

Run-Time Optimization and JIT

Run-Time Support for Optimizations Based on Escape Analysis (Abstract)

Thomas Kotzmann, Johannes Kepler University Linz, Linz, Austria

Hanspeter Mossenbock, Johannes Kepler University Linz, Linz, Austria

pp. 49-60

PDF

Evaluating Indirect Branch Handling Mechanisms in Software Dynamic Translation Systems (Abstract)

Jason D. Hiser, University of Virginia

Daniel Williams, University of Virginia

Wei Hu, University of Virginia

Jack W. Davidson, University of Virginia

Jason Mars, University of Pittsburgh

Bruce R. Childers, University of Pittsburgh

pp. 61-73

PDF

Persistent Code Caching: Exploiting Code Reuse Across Executions and Applications (Abstract)

Vijay Janapa Reddi, Harvard University

Dan Connors, University of Colorado

Robert Cohn, Intel Corporation

Michael D. Smith, Harvard University

pp. 74-88

PDF

Optimization I

Virtual Cluster Scheduling Through the Scheduling Graph (Abstract)

Josep M. Codina, UPC, Barcelona, Spain

Jes? S?nchez, UPC, Barcelona, Spain

Antonio Gonz?lez, UPC, Barcelona, Spain

pp. 89-101

PDF

On the Complexity of Register Coalescing (Abstract)

Florent Bouchez, LIP UMR CNRS-ENS Lyon-UCB Lyon-Inria, France

Alain Darte, LIP UMR CNRS-ENS Lyon-UCB Lyon-Inria, France

Fabrice Rastello, LIP UMR CNRS-ENS Lyon-UCB Lyon-Inria, France

pp. 102-114

PDF

A Dimension Abstraction Approach to Vectorization in Matlab (Abstract)

Neil Birkbeck, University of Alberta, Canada

Jonathan Levesque, University of Alberta, Canada

Jose Nelson Amaral, University of Alberta, Canada

pp. 115-130

PDF

Guiding Optimizations

Microarchitecture Sensitive Empirical Models for Compiler Optimizations (Abstract)

Kapil Vaswani, Indian Institute of Science, Bangalore

Matthew J. Thazhuthaveetil, Indian Institute of Science, Bangalore

Y. N. Srikant, Indian Institute of Science, Bangalore

P. J. Joseph, Freescale, India

pp. 131-143

PDF

Iterative Optimization in the Polyhedral Model: Part I, One-Dimensional Time (Abstract)

Louis-Noel Pouchet, ALCHEMY Group, INRIA FUTURS and Paris-Sud University

Cedric Bastoul, ALCHEMY Group, INRIA FUTURS and Paris-Sud University

Albert Cohen, ALCHEMY Group, INRIA FUTURS and Paris-Sud University

Nicolas Vasilache, ALCHEMY Group, INRIA FUTURS and Paris-Sud University

pp. 144-156

PDF

Evaluating Heuristic Optimization Phase Order Search Algorithms (Abstract)

Prasad A. Kulkarni, Florida State University

David B. Whalley, Florida State University

Gary S. Tyson, Florida State University

pp. 157-169

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Loop Optimization using Hierarchical Compilation and Kernel Decomposition (Abstract)

Denis Barthou, Universite de Versailles Saint-Quentin, France

Sebastien Donadio, Bull SA, Les Clayes sous Bois, France

Patrick Carribault, Bull SA, Les Clayes sous Bois, France

Alexandre Duchateau, LRC ITACA, CEA/DAM and Universit?e de Versailles Saint-Quentin, France

William Jalby, Universite de Versailles Saint-Quentin, France

pp. 170-184

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Profiling and Instrumentation

Rapidly Selecting Good Compiler Optimizations using Performance Counters (Abstract)

John Cavazos, University of Edinburgh, UK

Grigori Fursin, ALCHEMY Group, INRIA Futurs and LRI, Paris-Sud University, France

Felix Agakov, University of Edinburgh, UK

Edwin Bonilla, University of Edinburgh, UK

Michael F.P. O?Boyle, University of Edinburgh, UK

Olivier Temam, ALCHEMY Group, INRIA Futurs and LRI, Paris-Sud University, France

pp. 185-197

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Shadow Profiling: Hiding Instrumentation Costs with Parallelism (Abstract)

Tipp Moseley, University of Colorado

Alex Shye, University of Colorado

Vijay Janapa Reddi, University of Colorado

Dirk Grunwald, University of Colorado

Ramesh Peri, Intel Corporation, Hillsboro, OR

pp. 198-208

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SuperPin: Parallelizing Dynamic Instrumentation for Real-Time Performance (Abstract)

Steven Wallace, Intel Corporation

Kim Hazelwood, University of Virginia

pp. 209-220

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Special Issues

Compilation Techniques for Real-Time Java Programs (Abstract)

Mike Fulton, IBM Canada Ltd.

Mark Stoodley, IBM Canada Ltd.

pp. 221-231

PDF

Compiler-Directed Variable Latency Aware SPM Management to CopeWith Timing Problems (Abstract)

O. Ozturk, Pennsylvania State University

G. Chen, Pennsylvania State University

M. Kandemir, Pennsylvania State University

M. Karakoy, Imperial College, UK

pp. 232-243

PDF

Compiler-Managed Software-based Redundant Multi-Threading for Transient Fault Detection (Abstract)

Cheng Wang, Intel Corporation

Ho-seop Kim, Intel Corporation

Youfeng Wu, Intel Corporation

Victor Ying, Intel Corporation

pp. 244-258

PDF

Optimization II

Graph-Based Procedural Abstraction (Abstract)

A. Dreweke, University of Erlangen-Nuremberg, Germany

M. Worlein, University of Erlangen-Nuremberg, Germany

I. Fischer, University of Erlangen-Nuremberg, Germany

D. Schell, University of Erlangen-Nuremberg, Germany

Th. Meinl, University of Erlangen-Nuremberg, Germany

M. Philippsen, University of Erlangen-Nuremberg, Germany

pp. 259-270

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Structure Layout Optimization for Multithreaded Programs (Abstract)

Easwaran Raman, Princeton University

Robert Hundt, Hewlett-Packard Company

Sandya Mannarswamy, Hewlett-Packard Company

pp. 271-282

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Code Compaction of an Operating System Kernel (Abstract)

Haifeng He, University of Arizona, Tucson, AZ

John Trimble, University of Arizona, Tucson, AZ

Somu Perianayagam, University of Arizona, Tucson, AZ

Saumya Debray, University of Arizona, Tucson, AZ

Gregory Andrews, University of Arizona, Tucson, AZ

pp. 283-298

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Memory Optimizations

General-purpose operating systems, such as Linux, (Abstract)

Qin Zhao, Singapore-MIT Alliance

Rodric Rabbah, IBM T.J. Watson Research Center

Saman Amarasinghe, Massachusetts Institute of Technology

Larry Rudolph, Singapore-MIT Alliance

Weng-Fai Wong, Singapore-MIT Alliance

pp. 299-311

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Pipelined Execution of Critical Sections Using Software-Controlled Caching in Network Processors (Abstract)

Jinquan Dai, Intel China Software Center

Long Li, Intel China Software Center

Bo Huang, Intel China Software Center

pp. 312-324

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Isla Vista Heap Sizing: Using Feedback to Avoid Paging (Abstract)

Chris Grzegorczyk, University of California, Santa Barbara

Sunil Soman, University of California, Santa Barbara

Chandra Krintz, University of California, Santa Barbara

Rich Wolski, University of California, Santa Barbara

pp. 325-340

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Novel Architectures

Exploiting Narrow Accelerators with Data-Centric Subgraph Mapping (Abstract)

Amir Hormati, University of Michigan - Ann Arbor

Nathan Clark, University of Michigan - Ann Arbor

Scott Mahlke, University of Michigan - Ann Arbor

pp. 341-353

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Heterogeneous Clustered VLIW Microarchitectures (Abstract)

?lex Aleta, UPC, Barcelona, Spain

Josep M. Codina, UPC, Barcelona, Spain

Antonio Gonz?lez, UPC, Barcelona, Spain

David Kaeli, Northeastern University, Boston

pp. 354-366

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Profile-assisted Compiler Support for Dynamic Predication in Diverge-Merge Processors (Abstract)

Hyesoon Kim, University of Texas at Austin

Jos?e A. Joao, University of Texas at Austin

Onur Mutlu, Microsoft Research

Yale N. Patt, University of Texas at Austin

pp. 367-378

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Author Index

Author Index (PDF)

pp. 379