CSDL - Proceedings C

Message from the Program Chair (PDF)

pp. x

Committee Chairs (PDF)

pp. xi

Steering Committee (PDF)

pp. xii

Program Committee (PDF)

pp. xiii

External Reviewers (PDF)

pp. xiv

Corporate Supporters (PDF)

pp. xv

The Transmeta Code Morphing™ Software: Using Speculation, Recovery, and Adaptive Retranslation to Address Real-Life Challenges (Abstract)

1^st Workshop on Optimizations for DSP and Embedded Systems (ODES)

1^st Workshop on Managed Run TIme Workloads

1^st Workshop on Managed Run Time Workloads

Tutorials

ORP — A Java/CLI Platform for Investigating JIT and GC Technologies

On the Run — Building Dynamic Program Modifiers for Optimization, Introspection and Security

Security through Languages and Compilers

Keynote

Session 1: Dynamic Translation

James C. Dehnert, Transmeta Corporation

Brian K. Grant, Transmeta Corporation

John P. Banning, Transmeta Corporation

Richard Johnson, Transmeta Corporation

Thomas Kistler, Transmeta Corporation

Alexander Klaiber, Transmeta Corporation

Jim Mattson, Transmeta Corporation

pp. 15

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Dynamic Binary Translation for Accumulator-Oriented Architectures (Abstract)

Ho-Seop Kim, University of Wisconsin — Madison

James E. Smith, University of Wisconsin — Madison

pp. 25

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Retargetable and Reconfigurable Software Dynamic Translation (Abstract)

K. Scott, University of Virginia

N. Kumar, University of Pittsburgh

S. Velusamy, University of Virginia

B. Childers, University of Pittsburgh

J. W. Davidson, University of Virginia

M. L. Soffa, University of Pittsburgh

pp. 36

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Jumbo:Run-Time Code Generation for Java and Its Applications (Abstract)

Sam Kamin, University of Illinois at Urbana-Champaign

Lars Clausen, University of Illinois at Urbana-Champaign

Ava Jarvis, University of Illinois at Urbana-Champaign

pp. 48

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Session 2: Profile-Based Optimizations

Reality-Based Optimization (Abstract)

Scott McFarling, Microsoft Research

pp. 59

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Coupling On-Line and Off-Line Profile Information to Improve Program Performance (Abstract)

Chandra Krintz, University of California at Santa Barbara

pp. 69

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Dynamic Trace Selection Using Performance Monitoring Hardware Sampling (Abstract)

Howard Chen, University of Minnesota

Wei-Chung Hsu, University of Minnesota

Dong-Yuan Chen, Intel

pp. 79

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Optimal and Efficient Speculation-Based Partial Redundancy Elimination (Abstract)

Qiong Cai, University of New South Wales

Jingling Xue, University of New South Wales

pp. 91

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Session 3: EPIC Compilation

Optimizations to Prevent Cache Penalties for the Intel ? Itanium ? 2 Processor (Abstract)

Jean-Francois Collard, Intel Compiler Lab

Daniel Lavery, Intel Compiler Lab

pp. 105

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Optimization for the Intel ? Itanium ? Architectur Register Stack (Abstract)

Alex Settle, University of Colorado at Boulder

Daniel A. Connors, University of Colorado at Boulder

Gerolf Hoflehner, Intel Corporation

Dan Lavery, Intel Corporation

pp. 115

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Speculative Register Promotion Using Advanced Load Address Table (ALAT) (Abstract)

Jin Lin, University of Minnesota

Tong Chen, University of Minnesota

Wei-Chung Hsu, University of Minnesota

Pen-Chung Yew, University of Minnesota

pp. 125

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Inlining of Mathematical Functions in HP-UX for Itanium ? 2 (Abstract)

James W. Thomas, Hewlett-Packard Company

pp. 135

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Invited Lecture

Session 4: Code Scheduling

Improving Quasi-Dynamic Schedules through Region Slip (Abstract)

Francesco Spadini, University of Illinois at Urbana-Champaign

Brian Fahs, University of Illinois at Urbana-Champaign

Sanjay Patel, University of Illinois at Urbana-Champaign

Steven S. Lumetta, University of Illinois at Urbana-Champaign

pp. 149

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Integrated Prepass Scheduling for a Java Just-In-Time Compiler on the IA-64 Architecture (Abstract)

Tatsushi Inagaki, IBM Tokyo Research Laboratory

Hideaki Komatsu, IBM Tokyo Research Laboratory

Toshio Nakatani, IBM Tokyo Research Laboratory

pp. 159

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Predicate-Aware Scheduling: A Technique for Reducing Resource Constraints (Abstract)

Mikhail Smelyanskiy, University of Michigan

Scott A. Mahlke, University of Michigan

Edward S. Davidson, University of Michigan

Hsien-Hsin S. Lee, Georgia Institute of Technology

pp. 169

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Phi-Predication for Light-Weight If-Conversion (Abstract)

Weihaw Chuang, University of California at San Diego

Brad Calder, University of California at San Diego

Jeanne Ferrante, University of California at San Diego

pp. 179

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Session 5: Code Optimization — I

Local Scheduling Techniques for Memory Coherence in a Clustered VLIW Processor with a Distributed Data Cache (Abstract)

Enric Gibert, Universitat Polit?cnica de Catalunya

Jesús Sánchez, Universitat Polit?cnica de Catalunya

Antonio González, Universitat Polit?cnica de Catalunya

pp. 193

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Compiler Optimization-Space Exploration (Abstract)

Spyridon Triantafyllis, Princeton University

Manish Vachharajani, Princeton University

Neil Vachharajani, Princeton University

David I. August, Princeton University

pp. 204

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Optimizing Memory Accesses For Spatial Computation (Abstract)

Mihai Budiu, Carnegie Mellon University

Seth C. Goldstein, Carnegie Mellon University

pp. 216

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Optimization Opportunities Created by Global Data Reordering (Abstract)

Gadi Haber, IBM Research Lab in Haifa, Israel

Moshe Klausner, IBM Research Lab in Haifa, Israel

Vadim Eisenberg, IBM Research Lab in Haifa, Israel

Bilha Mendelson, IBM Research Lab in Haifa, Israel

Maxim Gurevich, IBM Research Lab in Haifa, Israel

pp. 228

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Session 6: Dynamic Adaptive Compilation

Design, Implementation and Evaluation of Adaptive Recompilation with On-Stack Replacement (Abstract)

Stephen J. Fink, IBM T.J. Watson Research Center

Feng Qian, McGill University

pp. 241

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Adaptive Online Context-Sensitive Inlining (Abstract)

Kim Hazelwood, Harvard University

David Grove, IBM T.J. Watson Research Center

pp. 253

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An Infrastructure for Adaptive Dynamic Optimization (Abstract)

Derek Bruening, Massachusetts Institute of Technology

Timothy Garnett, Massachusetts Institute of Technology

Saman Amarasinghe, Massachusetts Institute of Technology

pp. 265

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Dynamic Profiling and Trace Cache Generation (Abstract)

Marc Berndl, McGill University

Laurie Hendren, McGill University

pp. 276

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Session 7: Performance Monitoring

METRIC: Tracking Down Inefficiencies in the Memory Hierarchy via Binary Rewriting (Abstract)

Jaydeep Marathe, North Carolina State University

Frank Mueller, North Carolina State University

Tushar Mohan, University of Utah

Bronis R.de Supinski, Lawrence Livermore National Lab

Sally A. McKee, Cornell University

Andy Yoo, Lawrence Livermore National Lab

pp. 289

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TEST: A Tracer for Extracting Speculative Threads (Abstract)

Michael Chen, Stanford University

Kunle Olukotun, Stanford University

pp. 301

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Session 8: Code Optimization II

Code Optimization for Code Compression (Abstract)

Milenko Drinic, University of California

Darko Kirovski, Microsoft Research

Hoi Vo, Microsoft Research

pp. 315

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Hiding Program Slices for Software Security (Abstract)

Xiangyu Zhang, The University of Arizona

Rajiv Gupta, The University of Arizona

pp. 325

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Addressing Mode Selection (Abstract)

Erik Eckstein, ATAIR Software GmbH

Bernhard Scholz, Vienna University of Technology

pp. 337

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Author Index

null (PDF)

pp. 347