CSDL - Proceedings A

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Program Committee (PDF)

pp. viii

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The SawMill Framework for Virtual Memory Diversity (Abstract)

M. Aron, Department of Computer Science, Rice University

Jochen Liedtke, System Architecture Group, University of Karlsruhe

Kevin Elphinstone, System Architecture Group, University of Karlsruhe

Yoonho Park, IBM T.J. Watson Research Center

Trent Jaeger, IBM T.J. Watson Research Center

Luke Deller, School of Computer Science and Engineering, University of South Wales, Sydney

pp. 3

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Adaptive Interfacing with Reconfigurable Computers (Abstract)

Neil W. Bergmann, Queensland University of Technology

Anwar S. Dawood, Queensland University of Technology

pp. 11

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Error Detection for Adaptive Computing Architectures in Spacecraft Applications (Abstract)

David Brodrick, Queensland University of Technology

Anwar Dawood, Queensland University of Technology

Neil Bergmann, Queensland University of Technology

Melanie Wark, Queensland University of Technology

pp. 19

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Components + Security = OS Extensibility (Abstract)

Antony Edwards, University of NSW

Gernot Heiser, University of NSW

pp. 27

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Application Domains for Fixed-Length Block Structured Architectures (Abstract)

pp. 35

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A Simulator for High Speed Digital Communications (Abstract)

Ernest A. Fardin, The University of Western Australia

Peter Munro, The University of Western Australia

Jarred Scagliotta, The University of Western Australia

John Morris, The University of Western Australia

pp. 45

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Stacking them up: a Comparison of Virtual Machines (Abstract)

K. John Gough

pp. 55

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DSTRIDE: Data-Cache Miss-Address-Based Stride Prefetching Scheme for Multimedia Processors (Abstract)

G. Hariprakash, Sun Microsystems

R. Achutharaman, Sun Microsystems

Amos R. Omondi, Nanyang Technological University

pp. 62

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Two Cache Lines Prediction for a Wide-Issue Micro-architecture (Abstract)

Shu-Lin Hwang, MinGchi Institute of Technology

Feipei Lai, National Taiwan University

pp. 71

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Implementing an efficient vector instruction set in a chip multi-processor using micro-threaded pipelines (Abstract)

Chris Jesshope, Massey University

pp. 80

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High-Performance Extendable Instruction Set Computing (Abstract)

Heui Lee, Asia Design Corporation

Paul Becket, RMIT University

Bill Appelbe, RMIT University

pp. 89

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Fault-Tolerant Routing on Complete Josephus Cubes (Abstract)

Peter K. K. Loh, Nanyang Technological University

H. Schröder, Nanyang Technological University

W. I. Hsu, Nanyang Technological University

pp. 95

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Password-Capabilities: Their Evolution from the Password-Capability System into Walnut and Beyond (Abstract)

Ronald Pose, Monash University

pp. 105

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Retargetable Cache Simulation Using High Level Processor Models (Abstract)

Rajiv Ravindran, Indian Institute of Technology

Rajat Moona, Indian Institute of Technology

pp. 114

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Exploiting Java Instruction/Thread Level Parallelism with Horizontal Multithreading (Abstract)

Kenji Watanabe, University of Aizu

Wanming Chu, University of Aizu

Yamin Li, Hosei University

pp. 122

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The First Real Operating System for Reconfigurable Computers (Abstract)

Grant Wigley, University of South Australia

David Kearney, University of South Australia

pp. 130

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Performance Evaluation of a Partial Retraining Scheme for Defective Multi-Layer Neural Networks (Abstract)

Kunihito Yamamori, Japan Advanced Institute of Science and Technology

Toru Abe, Japan Advanced Institute of Science and Technology

Susumu Horiguchi, Japan Advanced Institute of Science and Technology

pp. 138

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Author Index (PDF)

pp. 147