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Proceedings. 14th Asian Test Symposium (2005)
Calcutta
Dec. 18, 2005 to Dec. 21, 2005
ISBN: 0-7695-2481-8
TABLE OF CONTENTS
Introduction
pp. xxiv
pp. xxvii
Foreword (PDF)
pp. xv
pp. xxiv
pp. xxvii
Cover
Introduction
Foreword (PDF)
pp. xv
Tutorials
Yervant Zorian , Virage Logic, USA
Juan-Antonio Carballo , IBM Corporation, USA
pp. xxviii-xxix
Plenary Talk
Thomas W. Williams , Synopsys Fellow, Synopsys, USA
pp. xxxi
Banquet Speeches
Sanjiv Taneja , Cadence Design Systems, USA
pp. xxxii
Invited Talks
John P. Hayes , University of Michigan, Ann Arbor, USA
pp. xxxiv
Session A1: Analog and RF Testing: I
Donghoon Han , Georgia Institute of Technology, Atlanta, GA
Abhijit Chatterjee , Georgia Institute of Technology, Atlanta, GA
pp. 2-7
Haihua Yan , Synopsys Inc., Mountain View, CA., USA
Adit D. Singh , ECE Auburn University Auburn, AL.
Gefu Xu , ECE Auburn University Auburn, AL.
pp. 8-13
Shalabh Goyal , Georgia Institute of Technology,USA
Michael Purtell , National Semiconductor Corporation,USA
pp. 14-17
Junichi HIRASE , Matsushita Electric Industrial Co., Ltd.
Yoshiyuki GOI , Matsushita Electric Industrial Co., Ltd.
Yoshiyuki TANAKA , Matsushita Electric Industrial Co., Ltd.
pp. 18-21
Ajoy K. Palit , University of Bremen, ITEM, Otto-Hahn-Allee-NW1, Bremen, Germany.
Lei Wu , University of Bremen, ITEM, Otto-Hahn-Allee-NW1, Bremen, Germany.
Kishore K. Duganapalli , University of Bremen, ITEM, Otto-Hahn-Allee-NW1, Germany.
Walter Anheier , University of Bremen, ITEM, Otto-Hahn-Allee-NW1, Germany.
Juergen Schloeffel , Philips Semiconductors GmbH, DTC, George-Heyken-Strasse 1, Germany.
pp. 22-27
Session B1: Verification, On-line and Software Testing
Nikolaos D. Liveris , Northwestern University, Evanston, IL
Hai Zhou , Northwestern University, Evanston, IL
Prithviraj Banerjee , University of Illinois, Chicago, IL
pp. 28-33
Amir Hekmatpour , IBM System & Technology Group, Research Triangle Park, NC
Azadeh Salehi , IBM Software Group, Lotus, Westford, MA USA
pp. 34-39
K Uday Bhaskar , Indian Institute of Technology Madras Chennai, India
M Prasanth , Indian Institute of Technology Madras Chennai, India
V Kamakoti , Indian Institute of Technology Madras Chennai, India
Kailasnath Maneparambil , Intel Corporation, Chandler, AZ, USA
pp. 40-45
Zhang Guangmei , Academy of Sciences Shan Dong Agriculture University
Chen Rui , Chinese Academy of Sciences
Li Xiaowei , Technology, Chinese Academy of Science
Han Congying , Shan Dong University of Science and Technology
pp. 46-51
Session A2: Analog and RF Testing: II
Yong-sheng WANG , Harbin Institute of Technology, Harbin, China
Jin-xiang WANG , Harbin Institute of Technology, Harbin, China
Feng-chang LAI , Harbin Institute of Technology, Harbin, China
Yi-zheng YE , Harbin Institute of Technology, Harbin, China
pp. 52-57
A. M. Majid , Georgia Institute of Technology, USA
D.C. Keezer , Georgia Institute of Technology, USA
J. V. Karia , Georgia Institute of Technology, USA
pp. 58-63
Achintya Halder , Georgia Institute of Technology, USA
Abhijit Chatterjee , Georgia Institute of Technology, USA
pp. 64-69
Shaolei Quan , Michigan State University, US
Qiang Qiang , Synopsys, Inc.
Chin-Long Wey , Natinal Central University, Taiwan
pp. 70-75
Session B2: Self-Checking, On-line and Software Testing
D. Marienfeld , University of Potsdam, Germany
E. S. Sogomonyan , University of Potsdam, Germany
V. Ocheretnij , University of Potsdam, Germany
M. Gossel , University of Potsdam, Germany
pp. 76-81
Guangyan Huang , Institute of Computing Technology, China
Guangmei Zhang , Shan Dong Agriculture University, China
Xiaowei Li , Institute of Computing Technology, China
Yunzhan Gong , Academy of Armored Forces Engineering, China
pp. 82-87
S Biswas , Advanced VLSI Design Laboratory, IIT Kharagpur
P Srikanth , Advanced VLSI Design Laboratory, IIT Kharagpur
R Jha , Advanced VLSI Design Laboratory, IIT Kharagpur
S Mukhopadhyay , Advanced VLSI Design Laboratory, IIT Kharagpur
A Patra , Advanced VLSI Design Laboratory, IIT Kharagpur
D Sarkar , Advanced VLSI Design Laboratory, IIT Kharagpur
pp. 88-93
Philip Samuel , Indian Institute of Technology, Kharagpur, India
Rajib Mall , Indian Institute of Technology, Kharagpur, India
pp. 94-99
Session A3: Interconnect Testing
Jiun-Lang Huang , National Taiwan University, Taipei, Taiwan
pp. 100-105
Ming-Shae Wu , National Chiao Tung University, Taiwan
Chung-Len Lee , National Chiao Tung University, Taiwan
Yeong-Jar Chang , Industrical Technology Research Institute, Taiwan
Wen-Ching Wu , Industrical Technology Research Institute, Taiwan
pp. 106-111
Wichian Sirisaengtaksin , University of Southern California
Sandeep K. Gupta , University of Southern California
pp. 112-119
Pei-Fu Shen , Beijing Normal University, Beijing
Hua-Wei Li , Chinese Academy of Sciences, Beijing
Yong-Jun Xu , Chinese Academy of Sciences, Beijing
Xiao-Wei Li , Chinese Academy of Sciences, Beijing
pp. 120-125
Session B3: BIST
Dong Xiang , Tsinghua University,Beijing, China
Mingjing Chen , Univ. of California, San Diego
Hideo Fujiwara , Nara Institute of Sci. and Technology, Japan
pp. 126-131
Chaowen Yu , University of Iowa
Sudhakar M. Reddy , University of Iowa
Irith Pomeranz , Purdue University
pp. 132-137
Mohammad Tehranipoor , Univ. of Maryland Baltimore County
Mehrdad Nourani , Univ. of Texas at Dallas
Nisar Ahmed , Texas Instruments
pp. 138-143
Huaguo Liang , Hefei University of Technology, China
Maoxiang Yi , Hefei University of Technology, China
Xiangsheng Fang , Hefei University of Technology, China
Cuiyun Jiang , Hefei University of Technology, China
pp. 144-149
Session A4: SoC Testing
Tomokazu Yoneda , Nara Institute of Science and Technology
Hisakazu Takakuwa , RICOH, Japan
Hideo Fujiwara , Nara Institute of Science and Technology
pp. 150-155
Hiroyuki Nakamura , Kawasaki Microelectronics
Akio Shirokane , Kawasaki Microelectronics
Yoshihito Nishizaki , Kawasaki Microelectronics
Anis Uzzaman , Cadence Design Systems, Inc
Vivek Chickermane , Cadence Design Systems, Inc
Brion Keller , Cadence Design Systems, Inc
Tsutomu Ube , Innotech Corporation
Yoshihiko Terauchi , Innotech Corporation
pp. 156-161
Anders Larsson , Linkopings Universitet, Sweden
Erik Larsson , Linkopings Universitet, Sweden
Petru Eles , Linkopings Universitet, Sweden
Zebo Peng , Linkopings Universitet, Sweden
pp. 162-169
Session B4: Yield Enhancement
Yu-Chun Dawn , National Tsing Hua University, Taiwan
Jen-Chieh Yeh , National Tsing Hua University, Taiwan
Cheng-Wen Wu , National Tsing Hua University, Taiwan
Chia-Ching Wang , Winbond Electronics Corporation, Taiwan
Yung-Chen Lin , Winbond Electronics Corporation, Taiwan
Chao-Hsun Chen , Winbond Electronics Corporation, Taiwan
pp. 182-187
Junichi HIRASE , Matsushita Electric Industrial Co., Ltd.
Tatsuya FURUKAWA , Matsushita Electric Industrial Co., Ltd.
pp. 188-193
Session A5: Delay and Defect-Based Testing
Manan Syal , Virginia Tech, Blacksburg, VA
Michael S. Hsiao , Virginia Tech, Blacksburg, VA
Suriyaprakash Natarajan , Intel Corporation, Santa Clara, CA
Sreejit Chakravarty , Intel Corporation, Santa Clara, CA
pp. 194-201
N. Devtaprasanna , University of Iowa, Iowa
S. M. Reddy , University of Iowa, Iowa
A. Gunda , LSI Logic Corporation, Milpitas, CA
P. Krishnamurthy , LSI Logic Corporation, Milpitas, CA
I. Pomeranz , Purdue University
pp. 202-207
I-De Huang , University of Southern California
Sandeep K. Gupta , University of Southern California
pp. 208-215
Kohei Miyase , Fukuoka, Japan Science and Technology Agency
Kenta Terashima , Kyushu Institute of Technology
Seiji Kajihara , Kyushu Institute of Technology
Xiaoqing Wen , Kyushu Institute of Technology
Sudhakar M. Reddy , University of Iowa
pp. 216-223
Session B5: Low Power Testing
Shih Ping Lin , National Chiao Tung University, Taiwan
Chung Len Lee , National Chiao Tung University, Taiwan
Jwu E Chen , National Central University, Taiwan
pp. 224-229
Youbean Kim , Yonsei University, Korea
Myung-Hoon Yang , Yonsei University, Korea
Yong Lee , Yonsei University, Korea
Sungho Kang , Yonsei University, Korea
pp. 230-235
Hadi Esmaeilzadeh , University of Tehran, Iran
Saeed Shamshiri , University of Tehran, Iran
Pooya Saeedi , University of Tehran, Iran
Zainalabedin Navabi , University of Tehran, Iran
pp. 236-241
Mohammed ElShoukry , Univ. of Maryland Baltimore County
Mohammad Tehranipoor , Univ. of Maryland Baltimore County
C.P. Ravikumar , Texas Instruments India
pp. 242-247
Session A6: Diagnosis, Delay, and Defect-Based Testing
Wei Zou , University of Iowa
Wu-Tung Cheng , Mentor Graphics Corporation, Wilsonville, OR
Sudhakar M. Reddy , University of Iowa
pp. 248-253
Yuki Yoshikaw , Nara Institute of Science and Technology, Japan
Satoshi Ohtake , Nara Institute of Science and Technology, Japan
Michiko Inoue , Nara Institute of Science and Technology, Japan
and Hideo Fujiwara , Nara Institute of Science and Technology, Japan
pp. 254-259
Thomas Clouqueur , Nara Institute of Science and Technology, Japan
Hideo Fujiwara , Nara Institute of Science and Technology, Japan
Kewal K. Saluja , University of Wisconsin-Madison, USA.
pp. 260-265
Sandip Kundu , University of Massachusetts, Amherst, MA
Piet Engelke , Albert-Ludwigs-University, Germany
Ilia Polian , Albert-Ludwigs-University, Germany
Bernd Becker , Albert-Ludwigs-University, Germany
pp. 266-271
Session B6: Test Generation and Fault Simulation
Shahrzad Mirkhani , University of Tehran, Iran
Zainalabedin Navabi , University of Tehran, Iran
pp. 278-283
Sukanta Das , Bengal Engineering and Science University, Shibpur, Howrah, India
H Rahaman , Bengal Engineering and Science University, Shibpur, Howrah, India
Biplab K Sikdar , Bengal Engineering and Science University, Shibpur, Howrah, India
pp. 284-287
Hideyuki Ichihara , Faculty of Information Sciences Hiroshima City University
Tomoo Inoue , Faculty of Information Sciences Hiroshima City University
Naoki Okamoto , Graduate School of Information Sciences Hiroshima City University
Toshinori Hosokawa , College of Industrial Technology Nihon University
Hideo Fujiwara , Nara Institute of Science and Technology
pp. 288-293
Vishwani D , Auburn University, USA
D. Agrawal , Auburn University, USA
Alok S. Doshi , Auburn University, USA
pp. 294-299
Session A7: Design for Testability
Hiroyuki Iwata , Nara Institute of Science and Technology, Japan
Tomokazu Yoneda , Nara Institute of Science and Technology, Japan
Satoshi Ohtake , Nara Institute of Science and Technology, Japan
Hideo Fujiwara , Nara Institute of Science and Technology, Japan
pp. 306-311
Jay Jahangiri , Mentor Graphics Corporation,Wilsonville, OR
Nilanjan Mukherjee , Mentor Graphics Corporation,Wilsonville, OR
Wu-Tung Cheng , Mentor Graphics Corporation,Wilsonville, OR
Subramanian Mahadevan , Mentor Graphics Corporation,Wilsonville, OR
Ron Press , Mentor Graphics Corporation,Wilsonville, OR
pp. 312-317
Dong Xiang , Tsinghua University, China
Kai wei Li , Tsinghua University, China
Hideo Fujiwara , Nara Institute of Science and Technology, Japan
pp. 318-323
Session B7: Test Compression and Compaction
Shih Ping Lin , National Chiao Tung University, Taiwan
Chung Len Lee , National Chiao Tung University, Taiwan
Jwu E Chen , National Central University, Taiwan
pp. 324-329
Sheng Zhang , University of Nebraska-Lincoln, USA
Sharad C. Seth , University of Nebraska-Lincoln, USA
Bhargab B. Bhattacharya , ACM Unit Indian Statistical Institute Calcutta
pp. 337-342
Yu-Hsuan Fu , National Chung-Hsing University, Taichung, Taiwan
Sying-Jyan Wang , National Chung-Hsing University, Taichung, Taiwan
pp. 343-347
Session A8: Design for Testability: II
D. Mukhopadhyay , Indian Institute of Technology Kharagpur, India
S. Banerjee , Indian Institute of Technology Kharagpur, India
D. RoyChowdhury , Indian Institute of Technology Kharagpur, India
B. B. Bhattacharya , Indian Institute of Technology Kharagpur, India
pp. 348-353
Shiyi Xu , Shanghai University, China
pp. 354-359
Katherine Shu-Min Li , National Chiao Tung University, Hsichu, Taiwan
Chung Len Lee , National Chiao Tung University, Hsichu, Taiwan
Tagin Jiang , National Chiao Tung University, Hsichu, Taiwan
Chauchin Su , National Chiao Tung University, Hsichu, Taiwan
Jwu E. Chen , National Central University, Chungli, Taiwan
pp. 360-365
Tsuyoshi Shinogi , Mie University, Tsu, Mie, JAPAN
Hiroyuki Yamada , Mie University, Tsu, Mie, JAPAN
Terumine Hayashi , Mie University, Tsu, Mie, JAPAN
Shinji Tsuruoka , Mie University, Tsu, Mie, JAPAN
Tomohiro Yoshikawa , Nagoya University, Nagoya, JAPAN
pp. 366-371
Session B8: Test Compression, Test Compaction, and Defect-Based Testing
Yinhe Han , Computing Technology, Chinese Academy of Sciences, Beijing, China
Xiaowei Li , Computing Technology, Chinese Academy of Sciences, Beijing, China
Shivakumar Swaminathan , IBM Microelectronics, Research Triangle Park, NC
Yu Hu , Computing Technology, Chinese Academy of Sciences, Beijing, China
Anshuman Chandra , Synopsys, Inc. Mountain View, CA
pp. 372-377
Aiman H. El-Maleh , King Fahd University, Saudi Arabia
S. Saqib Khursheed , King Fahd University, Saudi Arabia
Sadiq M. Sait , King Fahd University, Saudi Arabia
pp. 378-385
Youhua Shi , Waseda University, Japan
Nozomu Togawa , Waseda University, Japan
Masao Yanagisawa , Waseda University, Japan
Tatsuo Ohtsuki , Waseda University, Japan
Shinji Kimura , Grad. School of Infomation, Production and Systems, Waseda University, Japan
pp. 386-389
Zhigang Jiang , SynTest Technologies, Inc. Sunnyvale CA
Sandeep K. Gupta , University of Southern California
pp. 390-397
Session A9: Design for Testability: III
Biplab K Sikdar , Bengal Eng. and Science Univ., Shibpur, India
Arijit Sarkar , Bengal Eng. and Science Univ., Shibpur, India
S Roy , National Institute of Teachers' Training and Research, India
DeBesh K Das , Jadavpur University, India
pp. 398-403
S. Ghosh , Purdue University, IN
S. Bhunia , Purdue University, IN
K. Roy , Purdue University, IN
pp. 404-409
Shantanu Gupta , IIT Guwahati North Guwahati, Assam
Tarang Vaish , IIT Guwahati North Guwahati, Assam
Santanu Chattopadhyay , Electrical Communication Engineering,IIT Kharagpur, West Bengal
pp. 410-413
Varun Arora , Indian Institute of Technology, Kharagpur, India
Indranil Sengupta , Indian Institute of Technology, Kharagpur, India
pp. 414-421
Session B9: Fault Modeling, Processor Testing, and Memory Testing
Ilia Polian , Albert-Ludwigs-University, Germany
Thomas Fiehn , Albert-Ludwigs-University, Germany
Bernd Becker , Albert-Ludwigs-University, Germany
John P. Hayes , University of Michigan, USA
pp. 422-427
Kedarnath J. Balakrishnan , NEC Labs. America, Princeton, NJ
Nur A. Touba , University of Texas at Austin
Srinivas Patil , Intel Corporation, Austin, TX
pp. 428-433
Zaid Al-Ars , Delft University of Technology, The Netherlands
Said Hamdioui , Delft University of Technology, The Netherlands
Jorg Vollrath , Infineon Technologies AG, Munich, Germany
pp. 434-439
Ji-Xue Xiao , University of Electronic Science and Technology of China
Guang-Ju Chen , University of Electronic Science and Technology of China
Yong-Le Xie , University of Electronic Science and Technology of China
pp. 440-443
Kazuko Kambe , Nara Institute of Science and Technology, Kansai Science City , Japan
Michiko Inoue , Nara Institute of Science and Technology, Kansai Science City , Japan
Hideo Fujiwara , Nara Institute of Science and Technology, Kansai Science City , Japan
Tsuyoshi Iwagaki , Japan Advanced Institute of Science and Technology
pp. 444-449
Session C1: SoC Test Practices
Tom Waayers , Philips Research Laboratories, The Netherlands
Erik Jan Marinissen , Philips Research Laboratories, The Netherlands
Maurice Lousberg , Philips Research Laboratories, The Netherlands
pp. 450
Rubin A. Parekhji , Texas Instruments (India) Pvt. Ltd.
pp. 451
Session C2: Defect-Based Testing
Prabhu Krishnamurthy , LSI Logic Corp.
pp. 454
Vikram Iyengar , IBM Microelectronics, US
Phil Nigh , IBM Microelectronics, US
pp. 455
Session C4: Advances in Test Generation and Verification
Indradeep Ghosh , Fujitsu Laboratories of America, Sunnyvale, CA
pp. 458
Praveen Parvathala , Intel Corporation, Chandler, AZ
pp. 459
Subramanian Iyer , Univ. of Texas at Austin, TX
Jawahar Jain , Univ. of Texas at Austin, TX
Debashis Sahoo , Fujitsu Laboratories of America, USA
Takeshi Shimizu , Stanford University, CA
pp. 460
Session C5: Test Data Compression and System Level Testing
Kedarnath J. Balakrishnan , NEC Laboratories America, Princeton, NJ
pp. 462
Nilanjan Mukherjee , Mentor Graphics Corporation,Wilsonville, OR
pp. 463
Session C6: Mixed Signal Testing
Sasikumar Cherubal , Test Engineering, Wiquest Communications
pp. 466
Salem Abdennadher , Intel Corporation, Folsom, CA
Saghir A Shaikh , Sun Microsystems, San Diego, CA
pp. 467
Salem Abdennadher , Intel Corporation, Folsom, CA
Saghir A Shaikh , Sun Microsystems, San Diego, CA
pp. 468
Session C7: Delay Testing and Burn-in Test Methodologies
Vivek Chickermane , Cadence Design Systems, Endicott, NY
Brion Keller , Cadence Design Systems, Endicott, NY
Kevin McCauley , Cadence Design Systems, Endicott, NY
Anis Uzzaman , Cadence Design Systems, Endicott, NY
pp. 470
T.M. Mak , Intel Corporation
pp. 471
Fairuz Zakaria , Freescale Semiconductor, Selangor, Malaysia
Zainal Abu Kassim , Freescale Semiconductor, Selangor, Malaysia
Melanie Po-Leen Ooi , Monash University Malaysia
Serge Demidenko , Monash University Malaysia
pp. 472
Author Index
Author Index (PDF)
pp. 473
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