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13th Asian Test Symposium (ATS'04)
Kenting, Taiwan
November 15-November 17
ISBN: 0-7695-2235-1
Table of Contents
Introduction
Tutorials (PDF)
pp. xvi-xviii
Session A1: SOC Testing
null
Yinhe Han, Chinese Academy of Science
Yu Hu, Chinese Academy of Science
Huawei Li, Chinese Academy of Science
Xiaowei Li, Chinese Academy of Science
Anshuman Chandra, Synopsys, Inc.
pp. 8-13
Session B1: Low-Power Testing
null
Kuen-Jong Lee, National Cheng Kung University
Shaing-Jer Hsu, National Cheng Kung University
Chia-Ming Ho, National Cheng Kung University
pp. 26-31
Zhiqiang You, Nara Institute of Science and Technology
Ken?ichi Yamaguchi, Nara National College of Technology
Michiko Inoue, Nara Institute of Science and Technology
Jacob Savir, New Jersey Institute of Technology
Hideo Fujiwara, Nara Institute of Science and Technology
pp. 32-39
Nan-Cheng Lai, National Chung-Hsing University
Sying-Jyan Wang, National Chung-Hsing University
Yu-Hsuan Fu, National Chung-Hsing University
pp. 40-45
Session C1: Analog BIST
null
Session A2: Advanced DFT
null
Kohei Miyase, Kyushu Institute of Technology
Seiji Kajihara, Kyushu Institute of Technology
Sudhakar M. Reddy, University of Iowa
pp. 76-81
Dong Xiang, Tsinghua University
Ming-jing Chen, Tsinghua University
Kai-wei Li, Tsinghua University
Yu-liang Wu, Chinese University of Hong Kong
pp. 88-93
Session B2: Fault Analysis
null
John P. Hayes, University of Michigan and Albert-Ludwigs-University
Ilia Polian, Albert-Ludwigs-University
Bernd Becker, Albert-Ludwigs-University
pp. 100-105
Masaki Hashizume, University of Tokushima
Daisuke Yoneda, University of Tokushima
Hiroyuki Yotsuyanagi, University of Tokushima
Tetsuo Tada, Tokushima Bunri University
Takeshi Koyama, Tokushima Bunri University
Ikuro Morita, University of Tokushima
Takeomi Tamesada, University of Tokushima
pp. 112-117
K. Rothbart, Graz University of Technology
U. Neffe, Graz University of Technology
Ch. Steger, Graz University of Technology
R. Weiss, Graz University of Technology
E. Rieger, Philips Semiconductors
A. Muehlberger, Philips Semiconductors
pp. 118-121
Session C2: Cross-Talk Testing
null
Melvin A. Breuer, University of Southern California
Sandeep K. Gupta, University of Southern California
Shahin Nazarian, University of Southern California
pp. 124-131
Chung Liang Chen, National Chiao Tung University
Chung Len Lee, National Chiao Tung University
Ming-Shae Wu, National Chiao Tung University
pp. 140-144
Katherine Shu-Min Li, National Chiao Tung University
Chung Len Lee, National Chiao Tung University
Chauchin Su, National Chiao Tung University
Jwu E Chen, National Central University
pp. 145-150
Session A3: Functional Testing
null
Kazuko Kambe, Nara Institute of Science and Technology
Michiko Inoue, Nara Institute of Science and Technology
Hideo Fujiwara, Nara Institute of Science and Technology
pp. 152-157
Session B3: Logic BIST
null
Santosh Biswas, Indian Institute of Technology at Kharagpur
Siddhartha Mukhopadhyay, Indian Institute of Technology at Kharagpur
Amit Patra, Indian Institute of Technology at Kharagpur
pp. 184-189
Masayuki Arai, Tokyo Metropolitan University
Harunobu Kurokawa, Tokyo Metropolitan University
Kenichi Ichino, Tokyo Metropolitan University
Satoshi Fukumoto, Tokyo Metropolitan University
Kazuhiko Iwasaki, Tokyo Metropolitan University
pp. 190-195
Session C3: Fault Diagnosis
null
Wu-Tung Cheng, Mentor Graphics Corporation
Kun-Han Tsai, Mentor Graphics Corporation
Yu Huang, Mentor Graphics Corporation
Nagesh Tamarapalli, Mentor Graphics Corporation
Janusz Rajski, Mentor Graphics Corporation
pp. 204-209
S. Ghosh, University of Cincinnati
K. W. Lai, Broadcom Corporation
W. B. Jone, University of Cincinnati
S. C. Chang, National Tsing-Hua University
pp. 210-215
Session A4: SOC Test Scheduling
null
Zhiyuan He, Link?ping University
Gert Jervan, Link?ping University
Zebo Peng, Link?ping University
Petru Eles, Link?ping University
pp. 230-235
Yu Hu, Chinese Academy of Science
Yin-He Han, Chinese Academy of Science
Hua-Wei Li, Chinese Academy of Science
Tao Lv, Chinese Academy of Science
Xiao-Wei Li, Chinese Academy of Science
pp. 236-241
Jung-Been Im, Yonsei University
Sunghoon Chun, Yonsei University
Geunbae Kim, Yonsei University
Jin-Ho An, Yonsei University
Sungho Kang, Yonsei University
pp. 242-247
Session B4: Memory Testing
null
Chih-Tsun Huang, National Tsing Hua University
Jen-Chieh Yeh, National Tsing Hua University
Yuan-Yuan Shih, National Tsing Hua University
Rei-Fu Huang, National Tsing Hua University
Cheng-Wen Wu, National Tsing Hua University
pp. 260-265
Luigi Dilillo, Université de Montpellier 11/ CNRS
Patrick Girard, Université de Montpellier 11/ CNRS
Serge Pravossoudovitch, Université de Montpellier 11/ CNRS
Arnaud Virazel, Université de Montpellier 11/ CNRS
Simone Borri, Infineon Technologies France
Magali Hage-Hassan, Infineon Technologies France
pp. 266-271
Yi-Ming Sheng, National Tsing Hua University
Ming-Jun Hsiao, National Tsing Hua University
Tsin-Yuan Chang, National Tsing Hua University
pp. 272-276
Said Hamdioui, Delft University of Technology and Currently with Philips Semiconductor Crolles R&D
John D. Reyes, Intel Corporation
Zaid Al-ars, Delft University of Technology and CatRam Solutions
pp. 283-288
Session C4: Analog Testing
null
Chih-Haur Huang, National Cheng Kung University
Kuen-Jong Lee, National Cheng Kung University
Soon-Jyh Chang, National Cheng Kung University
pp. 296-301
Ganesh Srinivasan, Georgia Institute of Technology
Shalabh Goyal, Georgia Institute of Technology
Abhijit Chatterjee, Georgia Institute of Technology
pp. 302-307
C. C. Su, National Chiao Tung University
C. S. Chang, National Chiao Tung University
H. W. Huang, National Chiao Tung University
D. S. Tu, National Chiao Tung University
C. L. Lee, National Chiao Tung University
Jerry C. H. Lin, SynTest Technologies, Inc.
pp. 308-312
Session A5: Testable Design
null
Session B5: Testability Analysis
null
Guanghui Li, Zhejiang Forestry College and Chinese Academy of Sciences
Xiaowei Li, Chinese Academy of Sciences
pp. 336-341
Debesh Kumar Das, Jadavpur University
Tomoo Inoue, Hiroshima City University
Susanta Chakraborty, Kalyani University
Hideo Fujiwara, Nara Institute of Science and Technology
pp. 342-347
Chia Yee Ooi, Nara Institute of Science and Technology
Hideo Fujiwara, Nara Institute of Science and Technology
pp. 348-353
Session C5: Yield and Reliability
null
Chin-Long Wey, National Central University
Meng-Yao Liu, National Central University
pp. 360-365
Rei-Fu Huang, National Tsing Hua University
Chin-Lung Su, National Tsing Hua University
Cheng-Wen Wu, National Tsing Hua University
Shen-Tien Lin, Industrial Technology Research Institute
Kun-Lun Luo, Industrial Technology Research Institute
Yeong-Jar Chang, Industrial Technology Research Institute
pp. 366-371
Session A6: Fault Tolerance
null
Chuan-Ching Sue, National Cheng Kung University
Jun-Ying Yeh, National Cheng Kung University
Chin-Yu Huang, National Tsing Hua University
pp. 400-405
Session B6: FPGA Testing and Test Reduction
null
Shyue-Kung Lu, Fu Jen Catholic University
Hung-Chin Wu, Fu Jen Catholic University
Shoei-Jia Yan, Fu Jen Catholic University
Yu-Cheng Tsai, Fu Jen Catholic University
pp. 414-419
Hideyuki Ichihara, Hiroshima City University
Masakuni Ochi, Hiroshima City University
Michihiro Shintani, Hiroshima City University
Tomoo Inoue, Hiroshima City University
pp. 426-431
Session C6: Delay Testing
null
Lei Wang, University of Southern California
Sandeep K. Gupta, University of Southern California
Melvin A. Breuer, University of Southern California
pp. 440-447
Antonio Zenteno, National Institute for Astrophysics Optics and Electronics-INAOE
Victor H. Champac, National Institute for Astrophysics Optics and Electronics-INAOE
Michell Renovell, Laboratoire déInformatique, Robotique et de Microélectronique de Montpellier-LIRMM
Florence Azais, Laboratoire déInformatique, Robotique et de Microélectronique de Montpellier-LIRMM
pp. 460-463
Author Index
Author Index (PDF)
pp. 464-465
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