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Sixth Asian Test Symposium (ATS'97)
Akita, JAPAN
November 17-November 18
ISBN: 0-8186-8209-4
Table of Contents
Plenary Session: Keynote Address
Session 1A: Test Generation I, Chair: J. Savir, New Jersey Institute of Technology, USA
Seiji Kajihara, Kyushu Institute of Technology
Tsutomu Sasao, Kyushu Institute of Technology
pp. 10
Tsuyoshi Shinogi, Faculty of Engineering, Mie University
Terumine Hayashi, Faculty of Engineering, Mie University
Kazuo Taki, Faculty of Engineering, Kobe University
pp. 16
Session 1B: Design for Testability I, Chair: S.K. Jhajharia, Singapore Polytechnic, Singapore
S. Chiusano, Politecnico di Torino
F. Corno, Politecnico di Torino
P. Prinetto, Politecnico di Torino
M. Rebaudengo, Politecnico di Torino
M. Sonza Reorda, Politecnico di Torino
pp. 30
Kwame Osei Boateng, Faculty of Engineering, Ehime University
Hiroshi Takahashi, Faculty of Engineering, Ehime University
Yuzo Takamatsu, Faculty of Engineering, Ehime University
pp. 42
Shiyi Xu, Shanghai University of Science and Technology
Peter Waignjo, Shanghai University of Science and Technology
Percy G. Dias, Fudan University
Bole Shi, Fudan University
pp. 48
Session 2A: Test Generation II, Chair: B. Kaminska, OPMAXX, USA
Satoshi Ohtake, Nara Institute of Science and Technology
Tomoo Inoue, Nara Institute of Science and Technology
Hideo Fujiwara, Nara Institute of Science and Technology
pp. 62
F. Corno, Politecnico di Torino
P. Prinetto, Politecnico di Torino
M. Rebaudengo, Politecnico di Torino
M. Sonza Reorda, Politecnico di Torino
M. Violante, Politecnico di Torino
pp. 68
Session 2B: Fault Tolerance, Chair: N. Kanekawa, Hitachi, Japan
T. Ito, Dept. of Comput. Sci., Iwate Univ., Morioka, Japan
I. Takanami, Dept. of Comput. Sci., Iwate Univ., Morioka, Japan
pp. 88
M. Tsunoyama, Niigata Inst. of Technol., Japan
M. Uenoyama, Niigata Inst. of Technol., Japan
T. Kabasawa, Niigata Inst. of Technol., Japan
pp. 94
Hendrik Hartje, University of Potsdam
Michael Goessel, University of Potsdam
Egor S. Sogomonyan, Russian Academy of Sciences
pp. 100
Session 3A: Special Session I - Case Studies for DFT Techniques in Japanese Industry, Chair & Coordinator, M. Yoshida, NEC, Japan
Junji Mori, Toshiba Corp.
Ben Mathew, Silicon Graphics Inc.
Dave Burns, Silicon Graphics Inc.
Yeuk-Hai Mok, Silicon Graphics Inc.
pp. 108
K. Hatayama, Hitachi Research Laboratory, Hitachi, Ltd.
M. Ikeda, Hitachi Research Laboratory, Hitachi, Ltd.
M. Takakura, Hitachi Engineering, Co. Ltd.
S. Uchiyama, Hitachi Engineering, Co. Ltd.
Y. Sakamoto, Hitachi Information Technology, Co. Ltd.
pp. 112
T. Yoshida, Corporate Semicond. Dev. Div., Matsushita Electr. Ind. Co. Ltd., Kyoto, Japan
R. Shimoda, Corporate Semicond. Dev. Div., Matsushita Electr. Ind. Co. Ltd., Kyoto, Japan
T. Mizokawa, Corporate Semicond. Dev. Div., Matsushita Electr. Ind. Co. Ltd., Kyoto, Japan
K. Hirayama, Corporate Semicond. Dev. Div., Matsushita Electr. Ind. Co. Ltd., Kyoto, Japan
pp. 116
Toshinobu Ono, NEC Corporation, ULSI Systems Development Laboratories
Kazuo Wakui, NEC Corporation, ULSI Systems Development Laboratories
Hitoshi Hikima, NEC Corporation, ULSI Systems Development Laboratories
Yoshiyuki Nakamura, NEC Corporation, ULSI Systems Development Laboratories
Masaaki Yoshida, NEC Corporation, ULSI Systems Development Laboratories
pp. 122
Michiaki Emori, Fujitsu Limited
Junko Kumagai, Fujitsu Limited
Koichi Itaya, Fujitsu Limited
Takashi Aikyo, Fujitsu Limited
Tomoko Anan, Fujitsu Lsi Tecnology Limited
Junichi Niimi, Fujitsu Lsi Tecnology Limited
pp. 126
Session 3B: Test Technologies, Chair: M. Nishihara, IBM Japan
Cheng-Wen Wu, Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan
pp. 132
Marcel Jacomet, Biel School of Engineering
Roger Waelti, Biel School of Engineering
Lukas Winzenried, Biel School of Engineering
Jaime Perez, Biel School of Engineering
Martin Gysel, Biel School of Engineering
pp. 138
V. Dabholkar, Motorola Inc., Austin, TX, USA
S. Chakravarty, Motorola Inc., Austin, TX, USA
pp. 143
Josep Altet, Universitat Politecnica de Catalunya
Antonio Rubio, Universitat Politecnica de Catalunya
Hideo Tamamoto, Akita University
pp. 149
Z.M. Darus, Dept. of Electr., Electron. & Syst. Eng., Univ. Kebangsaan, Malaysia
I. Ahmed, Dept. of Electr., Electron. & Syst. Eng., Univ. Kebangsaan, Malaysia
L. Ali, Dept. of Electr., Electron. & Syst. Eng., Univ. Kebangsaan, Malaysia
pp. 155
Session 4A: Special Session II - Beam Testing of VLSI Circuits in Japan, Chair: K. Nikawa, NEC, Japan
Katsuyoshi Miura, Faculty of Engineering, Osaka University
Kohei Nakata, Faculty of Engineering, Osaka University
Koji Nakamae, Faculty of Engineering, Osaka University
Hiromu Fujioka, Faculty of Engineering, Osaka University
pp. 162
K. Yamazaki, Dept. of Comput. Sci., Meiji Univ., Kawasaki, Japan
T. Yamada, Dept. of Comput. Sci., Meiji Univ., Kawasaki, Japan
pp. 168
Session 4B: Mixed-Signal Test, Chair: C.W. Wu, National Tsing Hua University, Taiwan
N. Ben-Hamida, OPMAXX Inc., Beaverton, OR., USA
K. Saab, OPMAXX Inc., Beaverton, OR., USA
D. Marche, OPMAXX Inc., Beaverton, OR., USA
B. Kaminska, OPMAXX Inc., Beaverton, OR., USA
pp. 182
Chauchin Su, Dept. of Electr. Eng., Nat. Central Univ., Chung-Li, Taiwan
Yi-Ren Cheng, Dept. of Electr. Eng., Nat. Central Univ., Chung-Li, Taiwan
Yue-Tsang Chen, Dept. of Electr. Eng., Nat. Central Univ., Chung-Li, Taiwan
Shing Tenchen, Dept. of Electr. Eng., Nat. Central Univ., Chung-Li, Taiwan
pp. 194
Session 5A: Special Session III - Novel Beam Testing Techniques in Japan, Chair: M. Miyoshi, Toshiba, Japan
K. Ozaki, Fujitsu Laboratories Ltd.
H. Sekiguchi, Fujitsu Laboratories Ltd.
S. Wakana, Fujitsu Laboratories Ltd.
Y. Goto, Fujitsu Laboratories Ltd.
Y. Umehara, Advantest Corporation
J. Matsumoto, Advantest Corporation
pp. 208
Session 5B: Decision Diagrams and Logic Optimization; Coordinator: H. Fujioka, Osaka University, Japan
Moon-Bae Song, Dept. of Comput. Sci., Soongsil Univ., Seoul, South Korea
Hoon Chang, Dept. of Comput. Sci., Soongsil Univ., Seoul, South Korea
pp. 228
Yukihiro Iguchi, Meiji University
Tsutomu Sasao, Kyushu Institute of Technology
Munehiro Matsuura, Kyushu Institute of Technology
pp. 234
Session 6A: FPGA Test, Chair: S. Xu, Shanghai University of Science and Technology, China
H. Michinishi, Dept. of Inf. Technol., Okayama Univ., Japan
T. Yokohira, Dept. of Inf. Technol., Okayama Univ., Japan
T. Okamoto, Dept. of Inf. Technol., Okayama Univ., Japan
T. Inoue, Dept. of Inf. Technol., Okayama Univ., Japan
H. Fujiwara, Dept. of Inf. Technol., Okayama Univ., Japan
pp. 242
Session 6B: Software Test, Chair: T. Yoneda, Tokyo Institute of Technology, Japan
Session 7A: Diagnosis, Chair: Y. Min, Chinese Academy of Sciences, China
Tomoo Inoue, Nara Institute of Science and Technology
Satoshi Miyazaki, Nara Institute of Science and Technology
Hideo Fujiwara, Nara Institute of Science and Technology
pp. 276
Wen Xiaoqing, Dept. of Information Engineering, Akita 010, Japan
pp. 282
Chih Wei Hu, Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Chung Len Lee, Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Wen Ching Wu, Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
J.E. Chen, Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
pp. 288
Session 7B: Design for Testability II, Chair: A. Ivanov, University of British Columbia, Canada
Session 8A: Delay Test, Chair: C. Landrault, LIRMM, France
Wangning Long, Tsinghua University
Shiyuan Yang, Tsinghua University
Zhongcheng Li, Chinese Academy of Science
Yinghua Min, Chinese Academy of Science
pp. 326
Xiaoming Yu, Inst. of Comput. Technol., Acad. Sinica, Beijing, China
Yinghua Min, Inst. of Comput. Technol., Acad. Sinica, Beijing, China
pp. 332
Session 8B: Built-in Self-Test I, Chair: K. Iwasaki, Tokyo Metropolitan University, Japan
Kowen Lai, Rockwell Semicond. Syst., Newport Beach, CA, USA
C.A. Papachristou, Rockwell Semicond. Syst., Newport Beach, CA, USA
M. Baklashov, Rockwell Semicond. Syst., Newport Beach, CA, USA
pp. 338
Hiroshi Yokoyama, Mining College, Akita University
Xiaoqing Wen, Mining College, Akita University
Hideo Tamamoto, Mining College, Akita University
pp. 353
Michinobu Nakao, Hitachi Research Laboratory, Hitachi, Ltd.
Kazumi Hatayama, Hitachi Research Laboratory, Hitachi, Ltd.
Isao Higashi, General Purpose Computer Division, Hitachi, Ltd.,
pp. 359
Session 9A: Current Testing, Chair: J.E. Chen, Chung-Hua Polytechnic Institute, Taiwan
M. Dalmia, Dept. of Electr. & Comput. Eng., British Columbia Univ., Vancouver, BC, Canada
A. Ivanov, Dept. of Electr. & Comput. Eng., British Columbia Univ., Vancouver, BC, Canada
S. Tabatabaei, Dept. of Electr. & Comput. Eng., British Columbia Univ., Vancouver, BC, Canada
pp. 366
IDDT Testing (Abstract)
Yinghua Min, Institute of Computing Technology, Chinese Academy of Sciences
Zhuxing Zhao, Institute of Computing Technology, Chinese Academy of Sciences
Zhongcheng Li, Institute of Computing Technology, Chinese Academy of Sciences
pp. 378
Tsung-Chu Huang, Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
Min-Cheng Huang, Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
Kuen-Jong Lee, Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
pp. 384
Session 9B: Built-in Self-Test II, Chair: T. Tada, Mitsubishi, Japan
Gang-Min Park, Dept. of Comput. Sci., Soongsil Univ., Seoul, South Korea
Hoon Chang, Dept. of Comput. Sci., Soongsil Univ., Seoul, South Korea
pp. 404
Dariusz Badura, Silesian University of Katowice
Andrzej Hlawiczka, Silesian Technical University of Gliwice
pp. 410
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