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Fourth Asian Test Symposium (ATS'95)
Bangalore, India
November 23-November 24
ISBN: 0-8186-7129-7
Table of Contents
Reviewers (PDF)
pp. xviii
Session 1 - Systems Test, Chair: D. Nikolos, University of Patras, Greece
O. Benkahla, Lab. de Genie Inf., IMAG, Grenoble, France
C. Aktouf, Lab. de Genie Inf., IMAG, Grenoble, France
C. Robach, Lab. de Genie Inf., IMAG, Grenoble, France
pp. 2
H.A. Xie, Dept. of Electr. & Electron. Eng., Melbourne Univ., Parkville, Vic., Australia
K. Forward, Dept. of Electr. & Electron. Eng., Melbourne Univ., Parkville, Vic., Australia
K.M. Adams, Dept. of Electr. & Electron. Eng., Melbourne Univ., Parkville, Vic., Australia
S. Kumar, Dept. of Electr. & Electron. Eng., Melbourne Univ., Parkville, Vic., Australia
pp. 9
Y.-H. Choi, Dept. of Comput. Eng., Hongik Univ., Seoul, South Korea
C. Kim, Dept. of Comput. Eng., Hongik Univ., Seoul, South Korea
pp. 15
N. Kamiura, Fac. of Eng., Himeji Inst. of Technol., Japan
Y. Hata, Fac. of Eng., Himeji Inst. of Technol., Japan
K. Yamato, Fac. of Eng., Himeji Inst. of Technol., Japan
pp. 20
Session 2 - Analysis Techniques, Chair: S. Xu, Shanghai University of Science and Technology, China
Yinghua Min, Inst. of Comput. Technol., Acad. Sinica, Beijing, China
Zhuxing Zhao, Inst. of Comput. Technol., Acad. Sinica, Beijing, China
Zhongcheng Li, Inst. of Comput. Technol., Acad. Sinica, Beijing, China
pp. 26
J.E. Chen, Dept. of Electr. Eng., Chung-Hua Polytech. Inst., Hsinchu, Taiwan
Chung Len Lee, Dept. of Electr. Eng., Chung-Hua Polytech. Inst., Hsinchu, Taiwan
Wen Zen Shen, Dept. of Electr. Eng., Chung-Hua Polytech. Inst., Hsinchu, Taiwan
Beyin Chen, Dept. of Electr. Eng., Chung-Hua Polytech. Inst., Hsinchu, Taiwan
pp. 33
Zuan Zhang, Fraunhofer-Inst. fur Integrierte Schaltungen Erlangen Aussenstelle Dresden, Germany
pp. 45
Session 3 - Diagnosis, Chair: B. Courtois, TZMA, France
Wen Xiaoqing, Min. Coll., Akita Univ., Japan
H. Tamamoto, Min. Coll., Akita Univ., Japan
K. Kinoshita, Min. Coll., Akita Univ., Japan
pp. 51
H. Takahashi, Dept. of Comput. Sci., Ehime Univ., Matsuyama, Japan
N. Yanagida, Dept. of Comput. Sci., Ehime Univ., Matsuyama, Japan
Y. Takamatsu, Dept. of Comput. Sci., Ehime Univ., Matsuyama, Japan
pp. 58
T. Yamada, Dept. of Comput. Sci., Meiji Univ., Kawasaki, Japan
K. Yamazaki, Dept. of Comput. Sci., Meiji Univ., Kawasaki, Japan
E.J. McCluskey, Dept. of Comput. Sci., Meiji Univ., Kawasaki, Japan
pp. 65
N. Das, Electron. Unit, Indian Stat. Inst., Calcutta, India
J. Dattagupta, Electron. Unit, Indian Stat. Inst., Calcutta, India
pp. 71
Session 4 - Fault Simulation, Chair: C.L. Lee, National Chiao Tung University, Taiwan
E. Harada, ULSI Syst. Dev. Labs., NEC Corp., Kawasaki, Japan
J.H. Patel, ULSI Syst. Dev. Labs., NEC Corp., Kawasaki, Japan
pp. 79
Chen-Pin Kung, Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Chun-Jieh Huang, Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Chen-Shang Lin, Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
pp. 93
M. Renovell, Lab. d'Inf., Robotique et Microelectron., Univ. des Sci. et Tech. du Languedoc, Montpellier, France
P. Huc, Lab. d'Inf., Robotique et Microelectron., Univ. des Sci. et Tech. du Languedoc, Montpellier, France
Y. Bertrand, Lab. d'Inf., Robotique et Microelectron., Univ. des Sci. et Tech. du Languedoc, Montpellier, France
pp. 100
W. Hahn, Fac. of Math. & Comput. Sci., Passau Univ., Germany
A. Hagerer, Fac. of Math. & Comput. Sci., Passau Univ., Germany
R. Kandlbinder, Fac. of Math. & Comput. Sci., Passau Univ., Germany
pp. 107
Session 5 - Mixed-Signal Test, Chair: M.M. Hasan, UT Kanpur, India
M. Renovell, Lab. de Inf., Robotique et Microelectron., Univ. des Sci. et Tech. du Languedoc, Montpellier, France
F. Azais, Lab. de Inf., Robotique et Microelectron., Univ. des Sci. et Tech. du Languedoc, Montpellier, France
Y. Bertrand, Lab. de Inf., Robotique et Microelectron., Univ. des Sci. et Tech. du Languedoc, Montpellier, France
pp. 113
Yeong-Ruey Shieh, Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan
Cheng- Wen Wu, Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan
pp. 120
J. Rzeszut, Ecole Polytech. de Montreal, Que., Canada
B. Kaminska, Ecole Polytech. de Montreal, Que., Canada
Y. Savaria, Ecole Polytech. de Montreal, Que., Canada
pp. 127
A.K.B. A'ain, Microelectron. Res. Group, Lancaster Univ., UK
A.H. Bratt, Microelectron. Res. Group, Lancaster Univ., UK
A.P. Dorey, Microelectron. Res. Group, Lancaster Univ., UK
pp. 133
H. Ihs, Lab. d'Inf., de Robotique et de Micro-electron., Univ. des Sci. et Tech. du Languedoc, Montpellier, France
C. Dufaza, Lab. d'Inf., de Robotique et de Micro-electron., Univ. des Sci. et Tech. du Languedoc, Montpellier, France
pp. 140
Session 6 - Design for Testability, Chair: C-S. Lin, National Taiwan University, Taiwan
S. Nandi, Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., Kharagpur, India
P. Pal Chaudhuri, Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., Kharagpur, India
pp. 146
S. Yano, 1st Comput. Oper. Unit, NEC Corp., Tokyo, Japan
pp. 153
S. Lavabre, Lab. d'Inf., Robotique et Microelectron., Univ. des Sci. et Tech. du Languedoc, Montpellier, France
Y. Bertrand, Lab. d'Inf., Robotique et Microelectron., Univ. des Sci. et Tech. du Languedoc, Montpellier, France
M. Renovell, Lab. d'Inf., Robotique et Microelectron., Univ. des Sci. et Tech. du Languedoc, Montpellier, France
C. Landrault, Lab. d'Inf., Robotique et Microelectron., Univ. des Sci. et Tech. du Languedoc, Montpellier, France
pp. 160
Y. Higami, Dept. of Appl. Phys., Osaka Univ., Japan
S. Kajihara, Dept. of Appl. Phys., Osaka Univ., Japan
K. Kinoshita, Dept. of Appl. Phys., Osaka Univ., Japan
pp. 169
D.K. Das, Dept. of Comput. Sci. & Eng., Jadavpur Univ., Calcutta, India
B.B. Bhattacharya, Dept. of Comput. Sci. & Eng., Jadavpur Univ., Calcutta, India
pp. 176
Session 7 - Education and Research in Testing, Chair: V.D. Agrawal, AT&T Bell Labs, USA
S.K. Jhajharia, Dept. of Electron. & Commun. Eng., Singapore Polytech., Singapore
H.S. Wang, Dept. of Electron. & Commun. Eng., Singapore Polytech., Singapore
pp. 184
Panel
Session 8 - Testability Measures, Chair: B.B. Bhattacharya, ISI, India
C.P. Ravikumar, Dept. of Electr. Eng., Indian Inst. of Technol., Delhi, India
G.S. Saund, Dept. of Electr. Eng., Indian Inst. of Technol., Delhi, India
N. Agrawal, Dept. of Electr. Eng., Indian Inst. of Technol., Delhi, India
pp. 192
Shiyi Xu, Shanghai Univ. of Sci. & Technol., China
G.P. Dias, Shanghai Univ. of Sci. & Technol., China
pp. 199
Y. Le Traon, LGI-IMAG, Grenoble, France
C. Robach, LGI-IMAG, Grenoble, France
pp. 206
Session 9 - Delay Test I, Chair: P. Varma, CrossCheck, USA
J. Savir, Power PC Dev. Center, IBM Corp., Austin, TX, USA
pp. 214
I. Pomeranz, Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
S.M. Reddy, Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
pp. 222
Wen Ching Wu, Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Chung Len Lee, Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
J.E. Chen, Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
pp. 229
Session 10 - ATPG, Chair: S. Kundu, IBM, USA
D.R. Chakrabarti, Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., Kanpur, India
A. Jain, Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., Kanpur, India
pp. 237
U. Mahlstedt, Inst. fur Theor. Elektrotech., Hannover Univ., Germany
J. Alt, Inst. fur Theor. Elektrotech., Hannover Univ., Germany
I. Hollenbeck, Inst. fur Theor. Elektrotech., Hannover Univ., Germany
pp. 244
H. Date, Res. Lab., Hitachi Ltd., Ibaraki, Japan
M. Nakao, Res. Lab., Hitachi Ltd., Ibaraki, Japan
K. Hatayama, Res. Lab., Hitachi Ltd., Ibaraki, Japan
pp. 252
T. Inoue, Graduate Sch. of Inf. Sci., Nara Inst. of Sci. & Technol., Japan
H. Fujiwara, Graduate Sch. of Inf. Sci., Nara Inst. of Sci. & Technol., Japan
H. Michinishi, Graduate Sch. of Inf. Sci., Nara Inst. of Sci. & Technol., Japan
T. Yokohira, Graduate Sch. of Inf. Sci., Nara Inst. of Sci. & Technol., Japan
T. Okamoto, Graduate Sch. of Inf. Sci., Nara Inst. of Sci. & Technol., Japan
pp. 259
A. Balakrishnan, RUTCOR, Rutgers Univ., Piscataway, NJ, USA
S.T. Chakradhar, RUTCOR, Rutgers Univ., Piscataway, NJ, USA
pp. 266
Session 11 - BIST, Chair: K. Furuya, Chuo University, Japan
J. Savir, Power PC Dev. Center, IBM Corp., Austin, TX, USA
pp. 274
Meng Lieh Sheu, Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Chung Len Lee, Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
pp. 279
Jing-Yang Jou, Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
pp. 286
M. Franklin, Dept. of Electr. & Comput. Eng., Clemson Univ., SC, USA
pp. 293
D. Gizopoulos, Inst. of Inf. & Telecommun., Athens, Greece
A. Paschalis, Inst. of Inf. & Telecommun., Athens, Greece
Y. Zorian, Inst. of Inf. & Telecommun., Athens, Greece
pp. 298
S. Demidenko, Singapore Polytech., Singapore
A. Ivanyukovich, Singapore Polytech., Singapore
L. Makhist, Singapore Polytech., Singapore
V. Piuri, Singapore Polytech., Singapore
pp. 303
Session 12 - Self-Checking Circuits, Chair: B. Mitra, Texas Instruments, India
I. Voyiatzis, Inst. of Inf. & Telecommun., Attiki, Greece
D. Nikolos, Inst. of Inf. & Telecommun., Attiki, Greece
A. Paschalis, Inst. of Inf. & Telecommun., Attiki, Greece
C. Halatsis, Inst. of Inf. & Telecommun., Attiki, Greece
T. Haniotakis, Inst. of Inf. & Telecommun., Attiki, Greece
pp. 309
N. Gaitanis, Inst. of Inf. & Telecommun., Athens, Greece
P. Kostarakis, Inst. of Inf. & Telecommun., Athens, Greece
A. Paschalis, Inst. of Inf. & Telecommun., Athens, Greece
pp. 316
G. Pada Biswas, Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., Kharagpur, India
I. Sen Gupta, Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., Kharagpur, India
pp. 322
F.Y. Busaba, Dept. of Electr. Eng., North Carolina A&T State Univ., Greensboro, NC, USA
P.K. Lala, Dept. of Electr. Eng., North Carolina A&T State Univ., Greensboro, NC, USA
pp. 327
Session 13 - Delay Test II, Chair: Y. Min, ICT, China
H. Takahashi, Dept. of Comput. Sci., Ehime Univ., Matsuyama, Japan
T. Watanabe, Dept. of Comput. Sci., Ehime Univ., Matsuyama, Japan
Y. Takamatsu, Dept. of Comput. Sci., Ehime Univ., Matsuyama, Japan
pp. 332
M.K. Srinivas, CAIP Center, Rutgers Univ., Piscataway, NJ, USA
V.D. Agrawal, CAIP Center, Rutgers Univ., Piscataway, NJ, USA
M.L. Bushnell, CAIP Center, Rutgers Univ., Piscataway, NJ, USA
pp. 339
J.P. Hurst, Center for Digital Syst. Eng., Res. Triangle Inst., Research Triangle Park, NC, USA
N. Kanopoulos, Center for Digital Syst. Eng., Res. Triangle Inst., Research Triangle Park, NC, USA
pp. 346
S. Bose, AT&T Bell Labs., Murray Hill, NJ, USA
V.D. Agrawal, AT&T Bell Labs., Murray Hill, NJ, USA
pp. 353
Session 14 - Technology-Specific Test, Chair: M. Franklin, Clemson University, USA
H. Ueda, Dept. of Appl. Phys., Osaka Univ., Japan
K. Kinoshita, Dept. of Appl. Phys., Osaka Univ., Japan
pp. 361
Jian Liu, Dept. of Electr. Eng., North Carolina Univ., Charlotte, NC, USA
R. Makki, Dept. of Electr. Eng., North Carolina Univ., Charlotte, NC, USA
pp. 367
Session 15 - Design-Specific Test, Chair: H. Fujiwara, NAIST, Japan
S. Pagey, Cadence Design Syst. Ltd., Noida, India
A. Khoche, Cadence Design Syst. Ltd., Noida, India
E. Brunvand, Cadence Design Syst. Ltd., Noida, India
pp. 382
M. De, USIC, Kalyani Univ., West Bengal, India
B.P. Sinha, USIC, Kalyani Univ., West Bengal, India
pp. 387
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