• A
  • ASYNC
  • 2004
  • 10th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'04)
Advanced Search 
10th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'04)
Crete, Greece
April 19-April 23
ISBN: 0-7695-2133-9
Table of Contents
Introduction
Keynote I
null
Session I: Design and Test
null
Jo Ebergen, Sun Microsystems Laboratories
Daniel Finchelstein, Sun Microsystems Laboratories
Russell Kao, Sun Microsystems Laboratories
Jon Lexau, Sun Microsystems Laboratories
David Hopkins, Sun Microsystems Laboratories
pp. 7-16
Session II: Timing
null
Jo Ebergen, Sun Microsystems Laboratories
Jonathan Gainsley, Sun Microsystems Laboratories
Paul Cunningham, Sun Microsystems Laboratories
pp. 51-61
Session III: Asynchronous Designs I
null
Marcos Ferretti, University of Southern California
Recep O. Ozdag, University of Southern California
Peter A. Beerel, University of Southern California
pp. 95-105
Keynote II
null
Session IV: Synthesis and Verification
null
Tomohiro Yoneda, National Institute of Informatics
Hiroomi Onda, Tokyo Institute of Technology
Chris Myers, University of Utah
pp. 135-145
Session V: Synchronization
null
I. Blunno, Politecnico di Torino
J. Cortadella, Universidad Politècnica de Catalunya
A. Kondratyev, Cadence Berkeley Labs
L. Lavagno, Politecnico di Torino and Cadence Berkeley Labs
K. Lwin, Cadence Berkeley Labs
C. Sotiriou, ICS-FORTH
pp. 149-158
Greg Semeraro, Rochester Institute of Technology
David H. Albonesi, University of Rochester
Grigorios Magklis, University of Rochester
Michael L. Scott, University of Rochester
Steven G. Dropsho, University of Rochester
Sandhya Dwarkadas, University of Rochester
pp. 159-169
Rostislav (Reuven) Dobkin, Technion-Israel Institute of Technology
Ran Ginosar, Technion-Israel Institute of Technology
pp. 170-180
Keynote III
null
Session VI: Asynchronous Design II
null
A. Efthymiou, University of Manchester
W. Suntiamorntut, University of Manchester
J. Garside, University of Manchester
L. E. M. Brackenbury, University of Manchester
pp. 207-215
Session VII: High Speed and Pulse Logic
null
Mika Nyström, California Institute of Technology
Elaine Ou, California Institute of Technology
Alain J. Martin, California Institute of Technology
pp. 229-239
Ron Ho, Sun Microsystems Research Laboratories
Jon Gainsley, Sun Microsystems Research Laboratories
Robert Drost, Sun Microsystems Research Laboratories
pp. 240-249
Author Index
Usage of this product signifies your acceptance of the Terms of Use.