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  • Ninth IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'03)
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Ninth IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'03)
Vancouver, B.C., Canada
May 12-May 15
ISBN: 0-7695-1898-2
Table of Contents
Introduction
Keynote I
Project Lessons Learned the Hard Way
Session I: Asynchronous Processors
Robert B. Reese, Mississippi State University
Mitchell A. Thornton, Southern Methodist University
Cherrice Traver, Union College
pp. 2
Alain J. Martin, California Institute of Technology
Mika Nyström, California Institute of Technology
Karl Papadantonakis, California Institute of Technology
Paul I. Pénzes, California Institute of Technology
Piyush Prakash, California Institute of Technology
Catherine G. Wong, California Institute of Technology
Jonathan Chang, California Institute of Technology
Kevin S. Ko, California Institute of Technology
Benjamin Lee, California Institute of Technology
Elaine Ou, California Institute of Technology
James Pugh, California Institute of Technology
Eino-Ville Talvala, California Institute of Technology
James T. Tong, California Institute of Technology
Ahmet Tura, California Institute of Technology
pp. 14
Session II: Pipeline Design and Tools
Session III: Synchronization
Yaron Semiat, Israel Institute of Technology
Ran Ginosar, Israel Institute of Technology
pp. 68
Keynote II
Clock Skew and other Myths
Session IV: Asynchronous Circuit Analysis
Nikolai Starodoubtsev, Tokyo University of Social Welfare
Sergei Bystrov, Russian Academy of Science
Alex Yakovlev, University of Newcastle upon Tyne
pp. 98
Session V: Interconnect Methods
W. J. Bainbridge, University of Manchester
W. B. Toms, University of Manchester
D. A. Edwards, University of Manchester
S. B. Furber, University of Manchester
pp. 132
Thomas Villiger, Swiss Federal Institute of Technology
Hubert K?slin, Swiss Federal Institute of Technology
Frank K. G?rkaynak, Swiss Federal Institute of Technology
Stephan Oetiker, Swiss Federal Institute of Technology
Wolfgang Fichtner, Swiss Federal Institute of Technology
pp. 141
Keynote III
Asynchronous Reality
Session VI: Synthesis
A. Bystrov, University of Newcastle upon Tyne
D. Sokolov, University of Newcastle upon Tyne
A. Yakovlev, University of Newcastle upon Tyne
pp. 164
Session VII: Power Management in Security and Signal Processing
Z. C. Yu, University of Manchester
S. B. Furber, University of Manchester
L. A. Plana, University of Manchester
pp. 206
Keynote IV
SOI — A Curse or a Boom?
Author Index
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