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Ninth IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'03)
Delay-Insensitive, Point-to-Point Interconnect Using M-of-N Codes
Vancouver, B.C., Canada
May 12-May 15
ISBN: 0-7695-1898-2
W. J. Bainbridge, University of Manchester
W. B. Toms, University of Manchester
D. A. Edwards, University of Manchester
S. B. Furber, University of Manchester

m-of-n codes can be used for carrying data over self-timed on-chip interconnect links. Such codes can be chosen to have low redundancy, but the costs of encoding/decoding data is high. The key to enabling the cost-effective use of m-of-n codes is to find a suitable mapping of the binary data to the code.

This paper presents a new method for selecting suitable mappings through the decomposition of the complex m-of-n code into an incomplete m-of-n code constructed from groups of smaller, simpler m-of-n and 1-of-n codes.

The circuits used both for completion detection and for encoding/decoding such incomplete codes show reduced logic size and delay compared to their full m-of-n counter-parts. The improvements mean that the incomplete m-of-n codes become attractive for use in on-chip interconnects and network-on-chip designs.

Citation:
W. J. Bainbridge, W. B. Toms, D. A. Edwards, S. B. Furber, "Delay-Insensitive, Point-to-Point Interconnect Using M-of-N Codes," async, pp.132, Ninth IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'03), 2003
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