Vancouver, B.C., Canada
May 12, 2003 to May 15, 2003
Ran Ginosar , Israel Institute of Technology
Transferring data between mutually asynchronous clock domains requires safe synchronization. However, the exact nature of synchronization sometimes eludes designers, and as a result synchronization circuits get "optimized" to the point where they do no longer operate correctly. This paper reviews a number of such cases, analyzes the causes of the errors, and offers a correct synchronizer circuit for each case. A correct two-flop synchronizer is presented. After discussing cases that avoid synchronization, the following synchronizers are reviewed: one flop, sneaky path, greedy path, wrong protocol, global reset, async clear, DFT leakage, pulse, slow-to-fast, metastability blocker, parallel and shared flop synchronizers.
Ran Ginosar, "Fourteen Ways to Fool Your Synchronizer", ASYNC, 2003, 2012 IEEE 18th International Symposium on Asynchronous Circuits and Systems, 2012 IEEE 18th International Symposium on Asynchronous Circuits and Systems 2003, pp. 89, doi:10.1109/ASYNC.2003.1199169