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  • Sixth International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC'00)
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Sixth International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC'00)
Eilat, Israel
April 02-April 06
ISBN: 0-7695-0586-4
Table of Contents
Session I: Theory & Verification Techniques, Chair: Mark Josephs
Marco A. Pena, Technical University of Catalonia
Jordi Cortadella, Technical University of Catalonia
Enric Pastor, Technical University of Catalonia
Alex Kondratyev, Theseus Logic Inc.
pp. 2
Composing Snippets (Abstract)
Igor Benko, University of Waterloo
Jo Ebergen, Sun Microsystems Laboratories
pp. 23
Session II: Asynchronous Design in Embedded Systems, Chair: Peter Beerel
Joep Kessels, Philips Research
Gerrit den Besten, Philips Research
Ad Peeters, Philips Research
Torsten Kramer, MAZ Hamburg
Volker Timm, Philips Semiconductors
pp. 36
George Taylor, University of Cambridge
Simon Moore, University of Cambridge
Steve Wilcox, University of Cambridge
Peter Robinson, University of Cambridge
pp. 45
Jens Muttersbach, Swiss Federal Institute of Technology
Thomas Villiger, Swiss Federal Institute of Technology
Wolfgang Fichtner, Swiss Federal Institute of Technology
pp. 52
Session III: Testability, Chair: Jens Sparsø
Session IV: Synthesis, Chair: Ken Stevens
Euiseok Kim, Kwangju Institute of Science and Technology
Jeong-Gun Lee, Kwangju Institute of Science and Technology
Dong-Ik Lee, Kwangju Institute of Science and Technology
pp. 104
Session V: Arbitration & Circuit Techniques, Chair: Tomohiro Yoneda
Priority Arbiters (Abstract)
A. Bystrov, University of Newcastle upon Tyne
D.J. Kinniment, University of Newcastle upon Tyne
A. Yakovlev, University of Newcastle upon Tyne
pp. 128
F. Xia, University of Newcastle upon Tyne
A. Yakovlev, University of Newcastle upon Tyne
D. Shang, University of Newcastle upon Tyne
A. Bystrov, University of Newcastle upon Tyne
A. Koelmans, University of Newcastle upon Tyne
D.J. Kinniment, University of Newcastle upon Tyne
pp. 150
Session VI: Processor Design, Chair: Doug Edwards
J.D. Garside, University of Manchester
W.J. Bainbridge, University of Manchester
A. Bardsley, University of Manchester
D.M. Clark, University of Manchester
D.A. Edwards, University of Manchester
S.B. Furber, University of Manchester
D.W. Lloyd, University of Manchester
S. Mohammadi, University of Manchester
J.S. Pepper, University of Manchester
S. Temple, University of Manchester
J.V. Woods, University of Manchester
J. Liu, Cogency Technology Inc.
O. Petlin, ASIC Alliance Corporation
pp. 162
Session VII: Pushing the Performance Limit, Chair: Takashi Nanya
O. Hauck, Darmstadt University of Technology
A. Katoch, Darmstadt University of Technology
S. A. Huss, Darmstadt University of Technology
pp. 188
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