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Second International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '96)
Aizu-Wakamatsu, Fukushima, JAPAN
March 18-March 21
ISBN: 0-8186-7298-6
Table of Contents
Session 1: High-Speed Design
S. B. Furber, The University of Manchester
J. Liu, The University of Manchester
pp. 11
K.Y. Yun, Dept. of Electr. & Comput. Eng., California Univ., San Diego, La Jolla, CA, USA
P.A. Beerel, Dept. of Electr. & Comput. Eng., California Univ., San Diego, La Jolla, CA, USA
J. Arceo, Dept. of Electr. & Comput. Eng., California Univ., San Diego, La Jolla, CA, USA
pp. 17
Session 2: Logic Synthesis
Toshiyuki Miyamoto, Kumagai Lab., Department of Electrical Engineering Osaka University
Sadatoshi Kumagai, Kumagai Lab., Department of Electrical Engineering Osaka University
pp. 30
Jordi Cortadella, Universitat Politecnica de Catalunya
Michael Kishinevsky, The University of Aizu
Alex Kondratyev, The University of Aizu
Luciano Lavagno, Politecnico di Torino
Alex Yakovlev, University of Newcastle upon Tyne
pp. 36
Steven M. Burns, Department of Computer Science and Engineering University of Washington
pp. 48
Session 3: Architectural Synthesis
Tony Werner, Asynchronous Systems Research Group Department of Electrical and Computer Engineering University of California - Davis
Venkatesh Akella, Asynchronous Systems Research Group Department of Electrical and Computer Engineering University of California - Davis
pp. 69
D. K. Arvind, Department of Computer Science, The University of Edinburgh
V. E. F. Rebello, Department of Computer Science, The University of Edinburgh
pp. 80
Session 4: Formal Methods
Nozar Tabrizi, University of Adelaide
Michael J. Liebelt, University of Adelaide
Kamran Eshraghian, Faculty of Science and Technology Edith Cowan University
pp. 94
Martin E Bush, School of CISM, South Bank University
Mark B Josephs, School of CISM, South Bank University
pp. 104
Session 5: Novel Techniques
E. Grass, School of Electronic and Manufacturing Systems Engineering University of Westminster
R. C. S. Morling, School of Electronic and Manufacturing Systems Engineering University of Westminster
I. Kale, School of Electronic and Manufacturing Systems Engineering University of Westminster
pp. 143
Session 6: Design Automation and Measurements
Tomohiro Yoneda, Department of Computer Science, Tokyo Institute of Technology
Takashi Yoshikawa, Department of Computer Science, Tokyo Institute of Technology
pp. 152
R. Kol, Dept. of Electr. Eng., Technion-Israel Inst. of Technol., Haifa, Israel
R. Ginosar, Dept. of Electr. Eng., Technion-Israel Inst. of Technol., Haifa, Israel
G. Samuel, Dept. of Electr. Eng., Technion-Israel Inst. of Technol., Haifa, Israel
pp. 164
Session 7: Low Power and System Design
Jose A. Tierno, IBM T.J. Watson Research Center Yorktown Heights, NY 10598
Rajit Manohar, California Institute of Technology
Alain J. Martin, California Institute of Technology
pp. 188
J.D. Garside, The University of Manchester
S. Temple, The University of Manchester
R. Mehra, The University of Manchester
pp. 208
Session 8: Logic Optimization
Marco A. Pena, Department of Computer Architecture Universitat Politecnica de Catalunya
Jordi Cortadella, Department of Computer Architecture Universitat Politecnica de Catalunya
pp. 222
Tilman Kolks, IMEC, VSDM division, Kapeldreef 75, B-3001 Leuven, Belgium
Steven Vercauteren, IMEC, VSDM division, Kapeldreef 75, B-3001 Leuven, Belgium
Bill Lin, IMEC, VSDM division, Kapeldreef 75, B-3001 Leuven, Belgium
pp. 233
P.A. Beerel, Dept. of Electr. Eng. Syst., Univ. of Southern California, Los Angeles, CA, USA
K.Y. Yun, Dept. of Electr. Eng. Syst., Univ. of Southern California, Los Angeles, CA, USA
W.C. Chou, Dept. of Electr. Eng. Syst., Univ. of Southern California, Los Angeles, CA, USA
pp. 244
Special Session 3: Emedded Talk
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