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Second Working Conference on Asynchronous Design Methodologies
A single-rail re-implementation of a DCC error detector using a generic standard-cell library
London, England
May 30-May 31
ISBN: 0-8186-7098-3
| ASCII Text | x | ||
| K. Van Berkel, R. Burgess, J. Kessels, A. Peeters, M. Roncken, F. Schalij, R. van de Wiel, "A single-rail re-implementation of a DCC error detector using a generic standard-cell library," 2012 IEEE 18th International Symposium on Asynchronous Circuits and Systems, pp. 72, Second Working Conference on Asynchronous Design Methodologies, 1995. | |||
| BibTex | x | ||
| @article{ 10.1109/WCADM.1995.514644, author = {K. Van Berkel and R. Burgess and J. Kessels and A. Peeters and M. Roncken and F. Schalij and R. van de Wiel}, title = {A single-rail re-implementation of a DCC error detector using a generic standard-cell library}, journal ={2012 IEEE 18th International Symposium on Asynchronous Circuits and Systems}, volume = {0}, year = {1995}, isbn = {0-8186-7098-3}, pages = {72}, doi = {http://doi.ieeecomputersociety.org/10.1109/WCADM.1995.514644}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - 2012 IEEE 18th International Symposium on Asynchronous Circuits and Systems TI - A single-rail re-implementation of a DCC error detector using a generic standard-cell library SN - 0-8186-7098-3 SP EP A1 - K. Van Berkel, A1 - R. Burgess, A1 - J. Kessels, A1 - A. Peeters, A1 - M. Roncken, A1 - F. Schalij, A1 - R. van de Wiel, PY - 1995 KW - digital audio tape; error detection codes; asynchronous circuits; cellular arrays; integrated logic circuits; high level synthesis; DCC error detector; generic standard-cell library; single-rail re-implementation; fully asynchronous implementation; handshake signaling; single-rail data encoding; generic cell library; high-level Tangram description; handshake circuits; intermediate architecture; power dissipation VL - 0 JA - 2012 IEEE 18th International Symposium on Asynchronous Circuits and Systems ER - | |||
We present a fully asynchronous implementation of a DCC Error Detector. The circuit uses 4-phase handshake signaling and single-rail data encoding, and has been realized using standard cells from a generic cell library. The circuit is obtained by fully automatic translation from a high-level (Tangram) description, using handshake circuits as intermediate architecture. In comparison with a previous double-rail implementation the fabricated IC is 40% smaller (core area), three times faster, and consumes only a quarter of the power. Switching between two power supplies is described as a technique to reduce power dissipation even further. A comparative evaluation also includes an improved double-rail implementation and two synchronous circuits.
Index Terms:
digital audio tape; error detection codes; asynchronous circuits; cellular arrays; integrated logic circuits; high level synthesis; DCC error detector; generic standard-cell library; single-rail re-implementation; fully asynchronous implementation; handshake signaling; single-rail data encoding; generic cell library; high-level Tangram description; handshake circuits; intermediate architecture; power dissipation
Citation:
K. Van Berkel, R. Burgess, J. Kessels, A. Peeters, M. Roncken, F. Schalij, R. van de Wiel, "A single-rail re-implementation of a DCC error detector using a generic standard-cell library," async, pp.72, Second Working Conference on Asynchronous Design Methodologies, 1995
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