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- ASP-DAC
- 2004
- Asia and South Pacific Design Automation Conference 2004 (ASP-DAC'04)
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Asia and South Pacific Design Automation Conference 2004 (ASP-DAC'04) Pacifico Yokohama, Yokohama, Japan January 27-January 30 ISBN: 0-7803-8175-0 Table of Contents
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 | Keynote Address |
 | Session 1A - (Special Session) Invited Talks: Selected European Activities in SoC Low Power Design Methodologies and Research Networking |
 | Session 1B - Floorplanning |
Ning Fu, University of Kitakyushu, Japan pp. 19-24
 | Session 1C - Modeling for Analog Circuits |
Jun Tao, Fudan University, China P.R. pp. 45-50
 | Session 1D - Behavioral Synthesis |
Nozomu Togawa, The University of Kitakyushu, Japan; Waseda University, Japan pp. 74-79
 | Session 1E - Delay Test and BIST |
Kai Yang, University of California, Santa Barbara
Li-C. Wang, University of California, Santa Barbara pp. 92-97
Xiang Lu, Texas A&M University, College Station, TX
Zhuo Li, Texas A&M University, College Station, TX
Wangqi Qiu, Texas A&M University, College Station, TX pp. 98-103
Rei-Fu Huang, National Tsing Hua University, Hsinchu, Taiwan
Yan-Ting Lai, National Tsing Hua University, Hsinchu, Taiwan
Yung-Fa Chou, National Tsing Hua University, Hsinchu, Taiwan
Cheng-Wen Wu, National Tsing Hua University, Hsinchu, Taiwan pp. 104-109
Sukanta Das, B. E. College (a Deemed University), Howrah, India
Debdas Dey, B. E. College (a Deemed University), Howrah, India
Subhayan Sen, B. E. College (a Deemed University), Howrah, India pp. 110-112
 | Session 2A - (Special Session) Embedded Tutorial + Reguler Session: Embedded System Applications |
Chi-Ying Tsui, The Hong Kong University of Science & Technology, Hong Kong
Roger S. Cheng, The Hong Kong University of Science & Technology, Hong Kong
Wai Ho Mow, The Hong Kong University of Science & Technology, Hong Kong pp. 125-130
 | Session 2B - Placement |
Keoncheol Shin, Korea Advanced Institute of Science and Technology, KOREA
Taewhan Kim, Korea Advanced Institute of Science and Technology, KOREA pp. 155-158
Di Wu, Texas A&M University, College Station, TX
Jiang Hu, Texas A&M University, College Station, TX
Min Zhao, Advanced Tools Group, Motorola Inc., Austin, TX pp. 159-162
 | Session 2C - RF Design Methodology |
Zhao Li, University of Washington, Seattle, WA pp. 163-168
Min Chu, University of Washington, Seattle, WA
Kim Y. Wong, National Semiconductor Corporation, Federal Way, WA pp. 169-173
 | Session 2D - Practical Issues in Logic Synthesis |
Yen-Te Ho, National Tsing Hua University HsinChu, Taiwan pp. 205-208
Ali Iranli, University of Southern California, Los Angeles pp. 209-211
 | Session 2E - Effective Test and Diagnosis |
 | Session 3A - System-Level Design Methodology |
T. Kuhn, University of Tuebingen, Germany pp. 238-243
Michiaki Muraoka, Semiconductor Technology Academic Research Center (STARC), Japan
Hiroaki Nishi, Semiconductor Technology Academic Research Center (STARC), Japan
Hideaki Yokota, Semiconductor Technology Academic Research Center (STARC), Japan
Hideyuki Hamada, Semiconductor Technology Academic Research Center (STARC), Japan pp. 256-262
 | Session 3B - Advanced Design and Modeling Techniques |
Bo Yao, University of California, San Diego pp. 263-268
Shang-Wei Tu, National Chiao Tung University, Hsinchu, Taiwan pp. 269-273
Zhong Wang, University of Toronto, Ontario, Canada pp. 274-279
 | Session 3C - Analog Design and Evaluation |
Li-C Wang, University of California, Santa Barbara pp. 298-303
Sang-Gug Lee, Information and Communication University, South Korea pp. 304-306
Simon C. Li, National Yunlin University of Science and Technology pp. 307-309
 | Session 3D - System Design Verification |
 | Session 3E - (Special Session) Panel Discussion: Opportunities with the Open Architecture Test System |
 | Session 4A - (Special Session) Invited Talks: C-Based Design Examples |
 | Session 4B - Buffered Tree Construction |
C. N. Sze, Texas A&M University, College Station, TX
Jiang Hu, Texas A&M University, College Station, TX pp. 355-360
Jun Chen, University of California, Los Angeles
Lei He, University of California, Los Angeles pp. 367-372
 | Session 4C - Power-Aware Approach for Microprocessor Design |
Emil Talpes, Carnegie Mellon University, Pittsburgh, PA pp. 380-383
G. Surendra, Indian Institute of Science, Bangalore, India
S. K. Nandy, Indian Institute of Science, Bangalore, India pp. 384-386
G. Surendra, Indian Institute of Science, Bangalore, India
S. K. Nandy, Indian Institute of Science, Bangalore, India pp. 387-389
 | Session 4D - Analog Layout Techniques |
Takashi Nojima, SII EDA Technologies Inc., Japan; The University of Kitakyushu, Japan pp. 406-411
 | Session 5A - Formal Verification |
M. K. Iyer, University of California - Santa Barbara pp. 418-423
 | Session 5B - Routing Methodology |
 | Session 5C - Exploration for Advanced SoC Design |
 | Session 5D - Embedded Software |
Haobo Yu, University of California, Irvine, USA pp. 463-468
Yoonseo Choi, Korea Advanced Institute of Science and Technology, Korea
Taewhan Kim, Korea Advanced Institute of Science and Technology, Korea pp. 478-481
 | Session 6A - (Special Session) Embedded Tutorial: RF Modeling and Design Methodology |
 | Session 6B - Power Grid Analysis and Design |
Zuying Luo, Tsinghua University, Beijing, P.R. China
Yici Cai, Tsinghua University, Beijing, P.R. China
Zhu Pan, Tsinghua University, Beijing, P.R. China pp. 505-510
Jiro Iwai, Mathematical Systems Incorporated, Japan
Tetsuro Kage, Semiconductor Technology Academic Center, Japan
Hiroo Masuda, Semiconductor Technology Academic Center, Japan pp. 511-516
Tetsuro Kage, Semiconductor Technology Academic Research Center
Hiroo Masuda, Semiconductor Technology Academic Research Center pp. 517-522
 | Session 6C - (Special Session) Presentation + Poster Disscussion: University Design Contest |
Kun-Bin Lee, National Chiao Tung University, HsinChu, Taiwan
Hao-Yun Chin, National Chiao Tung University, HsinChu, Taiwan pp. 525-526
Ramchan Woo, Korea Advanced Institute of Science and Technology, Korea
Sungdae Choi, Korea Advanced Institute of Science and Technology, Korea
Ju-Ho Sohn, Korea Advanced Institute of Science and Technology, Korea
Seong-Jun Song, Korea Advanced Institute of Science and Technology, Korea
Young-Don Bae, Korea Advanced Institute of Science and Technology, Korea
Hoi-Jun Yoo, Korea Advanced Institute of Science and Technology, Korea pp. 533-534
Simon C. Li, National Yunlin University of Science and Technology pp. 535-536
Wing-Hung Ki, The Hong Kong University of Science & Technology, Hong Kong
Chi-Ying Tsui, The Hong Kong University of Science & Technology, Hong Kong pp. 539-540
Masaki Haruoka, Osaka University, Japan; Furuno Electric Co., Ltd, Japan pp. 541-542
Jun Ohta, Nara Institute of Science and Technology (NAIST) pp. 549-550
Hao Min, Fudan University, P.R. China pp. 553-554
Jun Ohta, Nara Institute of Science and Technology, Japan pp. 555-556
R. Minami, Toyama Prefectural University, Japan
H. Iwata, Toyama Prefectural University, Japan
T. Ohzone, Okayama Prefectural University, Japan pp. 559-560
Wing-Hung Ki, The Hong Kong University of Science and Technology, China
Chi-Ying Tsui, The Hong Kong University of Science and Technology, China pp. 561-562
Jun Ohta, Nara Institute of Science and Technology (NAIST), Japan
Yu Oya, Nara Institute of Science and Technology (NAIST), Japan
Takashi Tokuda, Nara Institute of Science and Technology (NAIST), Japan pp. 575-576
 | Session 6D - Novel Techniques in Logic Synthesis |
Ren? Krenz, Royal Institute of Technology, IMIT/KTH, Stockholm, Sweden
Elena Dubrova, Royal Institute of Technology, IMIT/KTH, Stockholm, Sweden pp. 597-599
 | Session 7A - (Special Session) Invited Talks: Future of ITS Technologies in the Ubiquitous Society |
 | Session 7B - Buffer Planning |
Zhuo Li, Texas A&M University, College Station, TX pp. 609-614
Yici Cai, Tsinghua Univ., Beijing, China
Jun Gu, Science & Technology University of Hong Kong pp. 615-620
Yuchun Ma, Tsinghua University, Beijing, China
Song Chen, Tsinghua University, Beijing, China
Yici Cai, Tsinghua University, Beijing, China
Jun Gu, Science & Technology University of HongKong, Hong Kong pp. 621-623
 | Session 7C - Design Verification and Simulation |
Tun Li, National University of Defense Technology, P. R. China
Yang Guo, National University of Defense Technology, P. R. China
SiKun Li, National University of Defense Technology, P. R. China
FuJiang Ao, National University of Defense Technology, P. R. China
GongJie Liu, National University of Defense Technology, P. R. China pp. 644-646
 | Session 7D - Task Scheduling with DVS |
Lap-Fai Leung, Hong Kong University of Science and Technology, China
Chi-Ying Tsui, Hong Kong University of Science and Technology, China
Wing-Hung Ki, Hong Kong University of Science and Technology, China pp. 647-652
Pai Chou, University of California, Irvine pp. 659-662
Wing-Hung Ki, Hong Kong University of Science and Technology pp. 663-665
 | Session 8A - Global Routing |
Jingyu Xu, Tsinghua Univ., Beijing, P.R. China
Tong Jing, Tsinghua Univ., Beijing, P.R. China
Jun Gu, Hong Kong Univ. of S & T, P. R. China pp. 677-682
Qi Zhu, Tsinghua Univ., Beijing, P. R. China; UC Berkeley, CA
Hai Zhou, Northwestern Univ., Evanston, IL
Tong Jing, Tsinghua Univ., Beijing, P. R. China
Yang Yang, Tsinghua Univ., Beijing, P. R. China pp. 687-690
 | Session 8B - Interconnect and ESD Extraction |
Liu Yang, Tsinghua Univ., Beijing, China pp. 702-706
Zeyi Wang, Tsinghua Univ., Beijing, P.R. China pp. 707-709
R. Y. Zhan, Illinois Institute of Technology, Chicago, IL
H. G. Feng, Illinois Institute of Technology, Chicago, IL
Q. Wu, Illinois Institute of Technology, Chicago, IL
X. K. Guan, Illinois Institute of Technology, Chicago, IL
G. Chen, Illinois Institute of Technology, Chicago, IL
H. L. Xie, Illinois Institute of Technology, Chicago, IL
A. Z. Wang, Illinois Institute of Technology, Chicago, IL pp. 710-712
 | Session 8C - Reconfigurable Systems |
Chi-Chou Kao, National Pingtung Institute of Commerce, Pingtung, Taiwan
Yen-Tai Lai, National Cheng Kung University, Tainan, Taiwan pp. 719-724
Young-Il Kim, Korea Advanced Institute of Science and Technology, Korea
Jae-Gon Lee, Korea Advanced Institute of Science and Technology, Korea pp. 734-736
 | Session 8D - HW/SW Co-Design |
Nozomu Togawa, The University of Kitakyushu, Japan; Waseda University, Japan pp. 743-750
Hua Wang, Katholieke Universiteit Leuven, Belgium pp. 759-761
 | Session 9A - (Special Session) Embedded Tutorial: DFM in Nm-Process Generation |
 | Session 9B - Advanced Interconnect Analysis |
Qingjian Yu, Cadence Design Systems, Inc., San Jose, CA pp. 786-791
 | Session 9C - (Special Session) Panel Discussion: Future Reconfigurable Computing System |
 | Session 9D - System-Level Architecture |
Sam Kerner, Carnegie Mellon University, Pittsburgh, PA pp. 799-805
Haobo Yu, University of California, Irvine pp. 812-817
 | Session 10A - Embedded System Architectures |
Meeyoung Cha, Korea Advanced Institute of Science and Technology, KOREA
Chun-Gi Lyuh, Korea Advanced Institute of Science and Technology, KOREA
Taewhan Kim, Korea Advanced Institute of Science and Technology, KOREA pp. 834-837
 | Session 10B - Crosstalk Noise Analysis |
 | Session 10C - Expressions for Boolean Functions |
 | Session 10D - Semi-Custom Techniques in System Design |
Fei Li, University of California, Los Angeles, CA
Lei He, University of California, Los Angeles, CA pp. 899-904 Usage of this product signifies your acceptance of the Terms of Use.
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