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Asia and South Pacific Design Automation Conference 2004 (ASP-DAC'04)
Pacifico Yokohama, Yokohama, Japan
January 27-January 30
ISBN: 0-7803-8175-0
Table of Contents
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pp. xxvii-xxviii
Keynote Address
Session 1A - (Special Session) Invited Talks: Selected European Activities in SoC Low Power Design Methodologies and Research Networking
Peter Marwedel, University of Dortmund, Germany
Lars Wehmeyer, University of Dortmund, Germany
Manish Verma, University of Dortmund, Germany
Stefan Steinke, Kostal GmbH & Co KG, Lüdenscheid, Germany
Urs Helmig, University of Dortmund, Germany
pp. 4-11
Session 1B - Floorplanning
Ning Fu, University of Kitakyushu, Japan
Shigetoshi Nakatake, University of Kitakyushu, Japan
Yasuhiro Takashima, University of Kitakyushu, Japan
Yoji Kajitani, University of Kitakyushu, Japan
pp. 19-24
Xuliang Zhang, SII EDA Techonologies Inc., Kitakyushu, Japan
Yoji Kajitani, The University of Kitakyushu, Japan
pp. 25-30
Jacob R. Minz, Georgia Institute of Technology, Atlanta, GA
Sung Kyu Lim, Georgia Institute of Technology, Atlanta, GA
pp. 31-37
Xiaoping Tang, Cadence Design Systems, San Jose, CA
Martin D.F. Wong, University of Illinois, Urbana, IL
pp. 38-41
Chang-Tzu Lin, Feng Chia University, Taichung, Taiwan
De-Sheng Chen, Feng Chia University, Taichung, Taiwan
Yi-Wen Wang, Feng Chia University, Taichung, Taiwan
pp. 42-44
Session 1C - Modeling for Analog Circuits
Jian Wang, Fudan University, China P.R.
Jun Tao, Fudan University, China P.R.
Xuan Zeng, Fudan University, China P.R.
Charles Chiang, Synopsys Inc., Mountain View, CA
Dian Zhou, University of Texas at Dallas
pp. 45-50
Ewout Martens, Katholieke Universiteit Leuven, Belgium
Georges Gielen, Katholieke Universiteit Leuven, Belgium
pp. 51-56
Payam Heydari, University of California, Irvine
pp. 57-60
Rasit Onur Topaloglu, University of California at San Diego
Alex Orailoglu, University of California at San Diego
pp. 62-67
Session 1D - Behavioral Synthesis
Deming Chen, University of California, Los Angeles
Jason Cong, University of California, Los Angeles
pp. 68-73
Jumpei Uchida, Waseda University, Japan
Nozomu Togawa, The University of Kitakyushu, Japan; Waseda University, Japan
Masao Yanagisawa, Waseda University, Japan
Tatsuo Ohtsuki, Waseda University, Japan
pp. 74-79
Nobuhiro Doi, Waseda University, Japan
Takashi Horiyama, Kyoto University, Japan
Masaki Nakanishi, Nara Institute of Science and Technology, Japan
Shinji Kimura, Waseda University, Japan
pp. 80-85
Session 1E - Delay Test and BIST
Kai Yang, University of California, Santa Barbara
Kwang-Ting Cheng, University of California, Santa Barbara
Li-C. Wang, University of California, Santa Barbara
pp. 92-97
Xiang Lu, Texas A&M University, College Station, TX
Zhuo Li, Texas A&M University, College Station, TX
Wangqi Qiu, Texas A&M University, College Station, TX
D. M. H. Walker, Texas A&M University, College Station, TX
Weiping Shi, Texas A&M University, College Station, TX
pp. 98-103
Rei-Fu Huang, National Tsing Hua University, Hsinchu, Taiwan
Yan-Ting Lai, National Tsing Hua University, Hsinchu, Taiwan
Yung-Fa Chou, National Tsing Hua University, Hsinchu, Taiwan
Cheng-Wen Wu, National Tsing Hua University, Hsinchu, Taiwan
pp. 104-109
Sukanta Das, B. E. College (a Deemed University), Howrah, India
Debdas Dey, B. E. College (a Deemed University), Howrah, India
Subhayan Sen, B. E. College (a Deemed University), Howrah, India
Biplab K. Sikdar, B. E. College (a Deemed University), Howrah, India
P. Pal Chaudhuri, B. E. College (a Deemed University), Howrah, India
pp. 110-112
Andrew B. Kahng, University of CA, San Diego
Sherief Reda, University of CA, San Diego
pp. 113-116
Session 2A - (Special Session) Embedded Tutorial + Reguler Session: Embedded System Applications
Yukikazu Nakamoto, NEC Network Development Laboratories, Japan
pp. 117-124
Yan Wang, ASTRI, Hong Kong
Chi-Ying Tsui, The Hong Kong University of Science & Technology, Hong Kong
Roger S. Cheng, The Hong Kong University of Science & Technology, Hong Kong
Wai Ho Mow, The Hong Kong University of Science & Technology, Hong Kong
pp. 125-130
Session 2B - Placement
Mongkol Ekpanyapong, Georgia Institute of Technology
Sung Kyu Lim, Georgia Institute of Technology
pp. 137-142
Bernd Obermeier, Technical University of Munich
Frank M. Johannes, Technical University of Munich
pp. 143-148
Tetsuya Iizuka, University of Tokyo, Japan
Makoto Ikeda, University of Tokyo, Japan
Kunihiro Asada, University of Tokyo, Japan
pp. 149-154
Keoncheol Shin, Korea Advanced Institute of Science and Technology, KOREA
Taewhan Kim, Korea Advanced Institute of Science and Technology, KOREA
pp. 155-158
Di Wu, Texas A&M University, College Station, TX
Jiang Hu, Texas A&M University, College Station, TX
Rabi Mahapatra, Texas A&M University, College Station, TX
Min Zhao, Advanced Tools Group, Motorola Inc., Austin, TX
pp. 159-162
Session 2C - RF Design Methodology
Zhao Li, University of Washington, Seattle, WA
Ravikanth Suravarapu, Oregon State University, Corvallis, OR
Roy Hartono, University of Washington, Seattle, WA
Sambuddha Bhattacharya, University of Washington, Seattle, WA
Karti Mayaram, Oregon State University, Corvallis, OR
Richard Shi, University of Washington, Seattle, WA
pp. 163-168
Min Chu, University of Washington, Seattle, WA
David J. Allstot, University of Washington, Seattle, WA
Jeffrey M. Huard, National Semiconductor Corporation, Federal Way, WA
Kim Y. Wong, National Semiconductor Corporation, Federal Way, WA
pp. 169-173
Praveen Ghanta, University of Arizona, USA
Zheng Li, University of Minnesota, USA
Jaijeet Roychowdhury, University of Minnesota, USA
pp. 175-180
Makram M. Mansour, Berkeley Design Automation, Santa Clara, CA
Mohammad M. Mansour, American University of Beirut, Beirut, Lebanon
Amit Mehrotra, University of Illinois at Urbana-Champaign
pp. 181-185
Session 2D - Practical Issues in Logic Synthesis
Ko Yoshikawa, NEC Corp., Fuchu, Tokyo
Keisuke Kanamaru, NEC Corp., Fuchu, Tokyo
Shigeto Inui, NEC Corp., Fuchu, Tokyo
Yasuhiko Hagihara, NEC Corp., Fuchu, Tokyo
Yuici Nakamura, NEC Corp., Fuchu, Tokyo
Takeshi Yoshimura, Waseda University, Japan
pp. 186-191
Hiroyuki Higuchi, Fujitsu Laboratories Ltd. / Kyushu University
Yusuke Matsunaga, Kyushu University
pp. 192-198
Yen-Te Ho, National Tsing Hua University HsinChu, Taiwan
Ting-Ting Hwang, National Tsing Hua University HsinChu, Taiwan
pp. 205-208
Chang Woo Kang, University of Southern California, Los Angeles
Ali Iranli, University of Southern California, Los Angeles
Massoud Pedram, University of Southern California, Los Angeles
pp. 209-211
Session 2E - Effective Test and Diagnosis
Ozgur Sinanoglu, University of California, San Diego
Alex Orailoglu, University of California, San Diego
pp. 212-217
Alexander Smith, University of Toronto, Canada
Andreas Veneris, University of Toronto, Canada
Anastasios Viglas, University of Toronto, Canada
pp. 218-223
Hafizur Rahaman, B. E. College (D. U.), India
Debesh K. Das, Jadavpur University, India
Bhargab B. Bhattacharya, Indian Statistical Institute, India
pp. 224-229
Terumine Hayashi, Mie University, Japan
Haruna Yoshioka, Mie University, Japan
Tsuyoshi Shinogi, Mie University, Japan
Hidehiko Kita, Mie University, Japan
Haruhiko Takase, Mie University, Japan
pp. 230-233
Seongmoon Wang, NEC Labs., America
Srimat T. Chakradhar, NEC Labs., America
Balakrishnan Kedarnath, University of Texas at Austin
pp. 234-237
Session 3A - System-Level Design Methodology
C. Schulz-Key, University of Tuebingen, Germany
M. Winterholer, University of Tuebingen, Germany
T. Schweizer, University of Tuebingen, Germany
T. Kuhn, University of Tuebingen, Germany
W. Rosenstiel, University of Tuebingen, Germany
pp. 238-243
Robertas Damasevicius, Kaunas University of Technology, Lithuania
Vytautas Stuikys, Kaunas University of Technology, Lithuania
pp. 244-249
Yuichiro Miyaoka, Waseda University
Nozomu Togawa, The University of Kitakyushu
Masao Yanagisawa, Waseda University
Tatsuo Ohtsuki, Waseda University
pp. 250-255
Michiaki Muraoka, Semiconductor Technology Academic Research Center (STARC), Japan
Hiroaki Nishi, Semiconductor Technology Academic Research Center (STARC), Japan
Rafael K. Morizawa, Semiconductor Technology Academic Research Center (STARC), Japan
Hideaki Yokota, Semiconductor Technology Academic Research Center (STARC), Japan
Hideyuki Hamada, Semiconductor Technology Academic Research Center (STARC), Japan
pp. 256-262
Session 3B - Advanced Design and Modeling Techniques
Makoto Mori, University of California, San Diego
Hongyu Chen, University of California, San Diego
Bo Yao, University of California, San Diego
Chung-Kuan Cheng, University of California, San Diego
pp. 263-268
Shang-Wei Tu, National Chiao Tung University, Hsinchu, Taiwan
Jing-Yang Jou, National Chiao Tung University, Hsinchu, Taiwan
Yao-Wen Chang, National Taiwan University, Taipei, Taiwan
pp. 269-273
Zhong Wang, University of Toronto, Ontario, Canada
Jianwen Zhu, University of Toronto, Ontario, Canada
pp. 274-279
Hsu-Wei Huang, National Chiao Tung University, Taiwan
Cheng-Yeh Wang, National Chiao Tung University, Taiwan
Jing-Yang Jou, National Chiao Tung University, Taiwan
pp. 280-283
Woopyo Jeong, Purdue University, West Lafayette, IN
Bipul Chandra Paul, Purdue University, West Lafayette, IN
Kaushik Roy, Purdue University, West Lafayette, IN
pp. 284-287
Session 3C - Analog Design and Evaluation
Kyeong-Sik Min, Kookmin University, Seoul, Korea
Young-Hee Kim, Changwon National University, Changwon-Si, Korea
Daejeong Kim, Kookmin University, Seoul, Korea
Dong Myeong Kim, Kookmin University, Seoul, Korea
Jin-Hong Ahn, Hynix Semiconductor Inc., Ichon-Si, Korea
pp. 288-291
Chee-Kian Ong, University of California, Santa Barbara
Dongwoo Hong, University of California, Santa Barbara
Kwang-Ting (Tim) Cheng, University of California, Santa Barbara
Li-C Wang, University of California, Santa Barbara
pp. 298-303
Quoc-Hoang Duong, Information and Communication University, South Korea
Sang-Gug Lee, Information and Communication University, South Korea
pp. 304-306
Simon C. Li, National Yunlin University of Science and Technology
Vincent Chia-Chang Lin, Etrend Electronics, Inc.
pp. 307-309
Session 3D - System Design Verification
Hue-Min Lin, National Chiao Tung University, Taiwan
Chia-Chih Yen, National Chiao Tung University, Taiwan
Che-Hua Shih, National Chiao Tung University, Taiwan
Jing-Yang Jou, National Chiao Tung University, Taiwan
pp. 328-333
Session 3E - (Special Session) Panel Discussion: Opportunities with the Open Architecture Test System
Rochit Rajsuman, Advantest America R&D Center, Santa Clara, CA
pp. 335-335
Srimat Chakradhar, NEC Laboratories America, Princeton, NJ
pp. 337-340
Dennis M. Petrich, Wavecrest Corporation, Eden Prairie, MN
pp. 342-342
Tetsuo Tada, Tokushima Bunri University, Japan
pp. 343-343
Session 4A - (Special Session) Invited Talks: C-Based Design Examples
Session 4B - Buffered Tree Construction
C. N. Sze, Texas A&M University, College Station, TX
Jiang Hu, Texas A&M University, College Station, TX
Charles J. Alpert, IBM Austin Research Lab, Austin, TX
pp. 355-360
Sampath Dechu, Micron Technology Inc., Boise, ID
Zion Cien Shen, Iowa State University, Ames, IA
Chris C. N. Chu, Iowa State University, Ames, IA
pp. 361-366
Jun Chen, University of California, Los Angeles
Lei He, University of California, Los Angeles
pp. 367-372
Session 4C - Power-Aware Approach for Microprocessor Design
Kugan Vivekanandarajah, Nanyang Technological University, Singapore
Thambipillai Srikanthan, Nanyang Technological University, Singapore
Saurav Bhattacharyya, Nanyang Technological University, Singapore
pp. 373-379
Venkata Syam P. Rapaka, Mentor Graphics Corp., Wilsonville, OR
Emil Talpes, Carnegie Mellon University, Pittsburgh, PA
Diana Marculescu, Carnegie Mellon University, Pittsburgh, PA
pp. 380-383
G. Surendra, Indian Institute of Science, Bangalore, India
Subhasis Banerjee, Indian Institute of Science, Bangalore, India
S. K. Nandy, Indian Institute of Science, Bangalore, India
pp. 384-386
Subhasis Banerjee, Indian Institute of Science, Bangalore, India
G. Surendra, Indian Institute of Science, Bangalore, India
S. K. Nandy, Indian Institute of Science, Bangalore, India
pp. 387-389
Subhasis Bhattacharjee, University of Bristol, UK
Dhiraj K. Pradhan, University of Bristol, UK
pp. 390-393
Session 4D - Analog Layout Techniques
Nuttorn Jangkrajarng, University of Washington, Seattle, WA
Sambuddha Bhattacharya, University of Washington, Seattle, WA
Roy Hartono, University of Washington, Seattle, WA
C-J. Richard Shi, University of Washington, Seattle, WA
pp. 394-399
Sambuddha Bhattacharya, University of Washington, Seattle, WA
Nuttorn Jangkrajarng, University of Washington, Seattle, WA
Roy Hartono, University of Washington, Seattle, WA
C-J. Richard Shi, University of Washington, Seattle, WA
pp. 400-405
Takashi Nojima, SII EDA Technologies Inc., Japan; The University of Kitakyushu, Japan
Xiaoke Zhu, SII EDA Technologies Inc., Japan
Yasuhiro Takashima, The University of Kitakyushu, Japan
Shigetoshi Nakatake, The University of Kitakyushu, Japan
Yoji Kajitani, The University of Kitakyushu, Japan
pp. 406-411
Session 5A - Formal Verification
Batsayan Das, IIT Kharagpur, India
Dipankar Sarkar, IIT Kharagpur, India
Santanu Chattopadhyay, IIT Guwahati, India
pp. 412-417
G. Parthasarathy, University of California - Santa Barbara
M. K. Iyer, University of California - Santa Barbara
K.-T. Cheng, University of California - Santa Barbara
Li. C. Wang, University of California - Santa Barbara
pp. 418-423
Markus Wedler, University of Kaiserslautern, Germany
Dominik Stoffel, University of Kaiserslautern, Germany
Wolfgang Kunz, University of Kaiserslautern, Germany
pp. 424-429
Session 5B - Routing Methodology
Xiaoping Tang, Cadence Design Systems, San Jose, CA
Martin D. F. Wong, University of Illinois, Urbana, IL
pp. 430-433
Noriyuki Miura, Keio University, Japan
Naoki Kato, Hitachi, Ltd., Japan
Tadahiro Kuroda, Keio University, Japan
pp. 434-437
Chanseok Hwang, Univ. of Southern California, Los Angeles
Massoud Pedram, Univ. of Southern California, Los Angeles
pp. 438-443
Hongyu Chen, UCSD CSE Department
Chung-Kuan Cheng, UCSD CSE Department
Andrew B. Kahng, UCSD CSE Department
Makoto Mori, Fujitsu Limited
Qinke Wang, UCSD CSE Department
pp. 444-449
Session 5C - Exploration for Advanced SoC Design
Yangdong (Steven) Deng, Carnegie Mellon University, Pittsburgh, PA
Wojciech Maly, Carnegie Mellon University, Pittsburgh, PA
pp. 450-455
Mao-Yin Wang, National Tsing Hua University, Taiwan
Chih-Pin Su, National Tsing Hua University, Taiwan
Chih-Tsun Huang, National Tsing Hua University, Taiwan
Cheng-Wen Wu, National Tsing Hua University, Taiwan
pp. 456-458
Frank Kienle, University of Kaiserslautern, Germany
Norbert Wehn, University of Kaiserslautern, Germany
pp. 459-462
Session 5D - Embedded Software
Haobo Yu, University of California, Irvine, USA
Rainer D?mer, University of California, Irvine, USA
Daniel Gajski, University of California, Irvine, USA
pp. 463-468
Aimen Bouchhima, TIMA laboratory, Grenoble, France
Sungjoo Yoo, TIMA laboratory, Grenoble, France
Ahmed Jerraya, TIMA laboratory, Grenoble, France
pp. 469-474
Yoonseo Choi, Korea Advanced Institute of Science and Technology, Korea
Taewhan Kim, Korea Advanced Institute of Science and Technology, Korea
pp. 478-481
Session 6A - (Special Session) Embedded Tutorial: RF Modeling and Design Methodology
Mitiko Miura-Mattausch, Hiroshima University, Japan
pp. 482-490
Robert A. Mullen, Cadence Design Systems, Inc., San Jose, CA
pp. 491-498
Session 6B - Power Grid Analysis and Design
Haifeng Qian, University of Minnesota, Minneapolis
Sachin S. Sapatnekar, University of Minnesota, Minneapolis
pp. 499-504
Jingjing Fu, Tsinghua University, Beijing, P.R. China
Zuying Luo, Tsinghua University, Beijing, P.R. China
Xianlong Hong, Tsinghua University, Beijing, P.R. China
Yici Cai, Tsinghua University, Beijing, P.R. China
Sheldon X.-D. Tan, University of California at Riverside, CA, USA
Zhu Pan, Tsinghua University, Beijing, P.R. China
pp. 505-510
Chieki Mizuta, Mathematical Systems Incorporated, Japan
Jiro Iwai, Mathematical Systems Incorporated, Japan
Ken Machida, Mathematical Systems Incorporated, Japan
Tetsuro Kage, Semiconductor Technology Academic Center, Japan
Hiroo Masuda, Semiconductor Technology Academic Center, Japan
pp. 511-516
Atsushi Kurokawa, Semiconductor Technology Academic Research Center
Nobuto Ono, SII EDA technologies Inc.
Tetsuro Kage, Semiconductor Technology Academic Research Center
Hiroo Masuda, Semiconductor Technology Academic Research Center
pp. 517-522
Session 6C - (Special Session) Presentation + Poster Disscussion: University Design Contest
Yusuke Oike, University of Tokyo, Japan
Makoto Ikeda, University of Tokyo, Japan
Kunihiro Asada, University of Tokyo, Japan
pp. 523-524
Kun-Bin Lee, National Chiao Tung University, HsinChu, Taiwan
Nelson Yen-Chung Chang, National Chiao Tung University, HsinChu, Taiwan
Hao-Yun Chin, National Chiao Tung University, HsinChu, Taiwan
Hui-Cheng Hsu, National Chiao Tung University, HsinChu, Taiwan
Chein-Wei Jen, National Chiao Tung University, HsinChu, Taiwan
pp. 525-526
Y. Kuroda, Kanazawa University, Japan
J. Miyakoshi, Kanazawa University, Japan
M. Miyama, Kanazawa University, Japan
K. Imamura, Kanazawa University, Japan
H. Hashimoto, Kanazawa University, Japan
M. Yoshimoto, Kanazawa University, Japan
pp. 527-528
Kimihiro Nishio, Toyohashi University of Technology, Japan
Hiroo Yonezu, Toyohashi University of Technology, Japan
Shinya Sawa, Toyohashi University of Technology, Japan
Yuzo Furukawa, Toyohashi University of Technology, Japan
pp. 529-530
Takashi Morimoto, Hiroshima University, Japan
Yohmei Harada, Hiroshima University, Japan
Tetsushi Koide, Hiroshima University, Japan
Hans J?rgen Mattausch, Hiroshima University, Japan
pp. 531-532
Ramchan Woo, Korea Advanced Institute of Science and Technology, Korea
Sungdae Choi, Korea Advanced Institute of Science and Technology, Korea
Ju-Ho Sohn, Korea Advanced Institute of Science and Technology, Korea
Seong-Jun Song, Korea Advanced Institute of Science and Technology, Korea
Young-Don Bae, Korea Advanced Institute of Science and Technology, Korea
Hoi-Jun Yoo, Korea Advanced Institute of Science and Technology, Korea
pp. 533-534
Simon C. Li, National Yunlin University of Science and Technology
Vincent Chia-Chang Lin, Etrend Electronics, Inc.
pp. 535-536
Naoto Miyamoto, University of Tohoku, Japan
Leo Karnan, University of Tohoku, Japan
Kazuyuki Maruo, Advantest Laboratories Ltd., Japan
Koji Kotani, University of Tohoku, Japan
Tadahiro Ohmi, University of Tohoku, Japan
pp. 537-538
Dongsheng Ma, Louisiana State University, Baton Rouge, LA
Wing-Hung Ki, The Hong Kong University of Science & Technology, Hong Kong
Chi-Ying Tsui, The Hong Kong University of Science & Technology, Hong Kong
pp. 539-540
Yoshihiro Utsurogi, Osaka University, Japan
Masaki Haruoka, Osaka University, Japan; Furuno Electric Co., Ltd, Japan
Toshimasa Matsuoka, Osaka University, Japan
Kenji Taniguchi, Osaka University, Japan
pp. 541-542
Yi-Ming Wang, Chung-Cheng University, Taiwan
Jinn-Shyan Wang, Chung-Cheng University, Taiwan
pp. 547-548
Jun Ohta, Nara Institute of Science and Technology (NAIST)
Tetsuo Furumiya, NAIST, Japan
David C. Ng, NAIST, Japan
Akihiro Uehara, NAIST, Japan
Keiichiro Kagawa, NAIST, Japan
Takashi Tokuda, NAIST, Japan
Masahiro Nunoshita, NAIST, Japan
pp. 549-550
Tetsuya Sueyoshi, Hiroshima University, Japan
Hiroshi Uchida, Hiroshima University, Japan
Hans J?rgen Mattausch, Hiroshima University, Japan
Tetsushi Koide, Hiroshima University, Japan
Yosuke Mitani, Hiroshima City University, Japan
Tetsuo Hironaka, Hiroshima City University, Japan
pp. 551-552
Chun-Pong Yu, CUHK, Hong Kong
Chiu-Sing Choy, CUHK, Hong Kong
Hao Min, Fudan University, P.R. China
Cheong-Fat Chan, CUHK, Hong Kong
Kong-Pang Pun, CUHK, Hong Kong
pp. 553-554
Keiichiro Kagawa, Nara Institute of Science and Technology, Japan
Tomoaki Kawakami, Nara Institute of Science and Technology, Japan
Hiroaki Asazu, Nara Institute of Science and Technology, Japan
Takashi Ikeuchi, Nara Institute of Science and Technology, Japan
Akiko Fujiuchi, Nara Institute of Science and Technology, Japan
Jun Ohta, Nara Institute of Science and Technology, Japan
Masahiro Nunoshita, Nara Institute of Science and Technology, Japan
pp. 555-556
Takeshi Ohkawa, Tohoku University, Japan
Toshiyuki Nozawa, Tohoku University, Japan
Masanori Fujibayashi, Tohoku University, Japan
Naoto Miyamoto, Tohoku University, Japan
Karnan Leo, Tohoku University, Japan
Soichiro Kita, Tohoku University, Japan
Koji Kotani, Tohoku University, Japan
Tadahiro Ohmi, Tohoku University, Japan
pp. 557-558
T. Matsuda, Toyama Prefectural University, Japan
R. Minami, Toyama Prefectural University, Japan
A. Kanamori, Toyama Prefectural University, Japan
H. Iwata, Toyama Prefectural University, Japan
T. Ohzone, Okayama Prefectural University, Japan
S. Yamamoto, Shikino Hightech Co., Ltd., Japan
T. Ihara, Shikino Hightech Co., Ltd.
S. Nakajima, Shikino Hightech Co., Ltd.
pp. 559-560
Martin Yeung-Kei Chui, The Hong Kong University of Science and Technology, China
Wing-Hung Ki, The Hong Kong University of Science and Technology, China
Chi-Ying Tsui, The Hong Kong University of Science and Technology, China
pp. 561-562
Arunkumar Balasundaram, Georgia Institute of Technology, Atlanta, GA
Angelo Pereira, Georgia Institute of Technology, Atlanta, GA
Jun Cheol Park, Georgia Institute of Technology, Atlanta, GA
Vincent J. Mooney III, Georgia Institute of Technology, Atlanta, GA
pp. 563-564
Kae-Jiun Mo, National Tsing-Hua University, Taiwan
Shao-Sheng Yang, National Tsing-Hua University, Taiwan
Tsin-Yuan Chang, National Tsing-Hua University, Taiwan
pp. 565-566
J. Y. Yeom, University of Tokyo, Japan
T. Ishitsu, University of Tokyo, Japan
H. Takahashi, University of Tokyo, Japan
pp. 567-568
Ryozo Katoh, Sophia University, Japan
Shin-ya Kobayashi, Sophia University, Japan
Takao Waho, Sophia University, Japan
pp. 569-570
Yoshihiro Iida, Tokai University, Japan
Naohiko Shimizu, Tokai University, Japan
pp. 571-572
Ekachai Leelarasmee, Chulalongkorn University, Thailand
Kanitpong Pengwon, Chiang Mai University, Thailand
pp. 573-574
Jun Ohta, Nara Institute of Science and Technology (NAIST), Japan
Koichi Yamamoto, Nara Institute of Science and Technology (NAIST), Japan
Yu Oya, Nara Institute of Science and Technology (NAIST), Japan
Keiichiro Kagawa, Nara Institute of Science and Technology (NAIST), Japan
Takashi Tokuda, Nara Institute of Science and Technology (NAIST), Japan
Masahiro Nunoshita, Nara Institute of Science and Technology (NAIST), Japan
pp. 575-576
Hala A. Farouk, Arab Academy for Science, Egypt
Magdy Saeb, Arab Academy for Science, Egypt
pp. 577-578
Session 6D - Novel Techniques in Logic Synthesis
Tsutomu Sasao, Kyushu Institute of Technology, Japan
Jon T. Butler, Naval Postgraduate School, Monterey, CA
pp. 585-590
Debatosh Debnath, Oakland University, Rochester, Michigan
Tsutomu Sasao, Kyushu Institute of Technology, Japan
pp. 591-596
Andr? Martinelli, Royal Institute of Technology, IMIT/KTH, Stockholm, Sweden
Ren? Krenz, Royal Institute of Technology, IMIT/KTH, Stockholm, Sweden
Elena Dubrova, Royal Institute of Technology, IMIT/KTH, Stockholm, Sweden
pp. 597-599
Katsunori Tanaka, Kyoto University, Japan
Yahiko Kambayashi, Kyoto University, Japan
pp. 600-603
Session 7A - (Special Session) Invited Talks: Future of ITS Technologies in the Ubiquitous Society
Session 7B - Buffer Planning
Weiping Shi, Texas A&M University, College Station, TX
Zhuo Li, Texas A&M University, College Station, TX
Charles J. Alpert, IBM Austin Research Lab., Austin, TX
pp. 609-614
Song Chen, Tsinghua Univ., Beijing, China
Xianlong Hong, Tsinghua Univ., Beijing, China
Sheqin Dong, Tsinghua Univ., Beijing, China
Yuchun Ma, Tsinghua Univ., Beijing, China
Yici Cai, Tsinghua Univ., Beijing, China
Chung-Kuan Cheng, Univ. of California, San Diego USA
Jun Gu, Science & Technology University of Hong Kong
pp. 615-620
Yuchun Ma, Tsinghua University, Beijing, China
Xianlong Hong, Tsinghua University, Beijing, China
Sheqin Dong, Tsinghua University, Beijing, China
Song Chen, Tsinghua University, Beijing, China
Yici Cai, Tsinghua University, Beijing, China
Chung-Kuan Cheng, University of California, San Diego
Jun Gu, Science & Technology University of HongKong, Hong Kong
pp. 621-623
Yi-Hui Cheng, Synopsys Inc., Taipei, Taiwan
Yao-Wen Chang, National Taiwan University, Taipei, Taiwan
pp. 624-627
Session 7C - Design Verification and Simulation
Robert Claris?, Universitat Polit?cnica de Catalunya
Jordi Cortadella, Universitat Polit?cnica de Catalunya
pp. 628-633
Tao Feng, UC-Santa Barbara
Li-C. Wang, UC-Santa Barbara
Kwang-Ting Cheng, UC-Santa Barbara
pp. 634-639
G?rschwin Fey, University of Bremen, Germany
Rolf Drechsler, University of Bremen, Germany
pp. 640-643
Tun Li, National University of Defense Technology, P. R. China
Yang Guo, National University of Defense Technology, P. R. China
SiKun Li, National University of Defense Technology, P. R. China
FuJiang Ao, National University of Defense Technology, P. R. China
GongJie Liu, National University of Defense Technology, P. R. China
pp. 644-646
Session 7D - Task Scheduling with DVS
Lap-Fai Leung, Hong Kong University of Science and Technology, China
Chi-Ying Tsui, Hong Kong University of Science and Technology, China
Wing-Hung Ki, Hong Kong University of Science and Technology, China
pp. 647-652
Dongkun Shin, Seoul National University, Korea
Jihong Kim, Seoul National University, Korea
pp. 653-658
Bita Gorji-Ara, University of California, Irvine
Pai Chou, University of California, Irvine
Nader Bagherzadeh, University of California, Irvine
Mehrdad Reshadi, University of California, Irvine
David Jensen, Rockwell Collins, Cedar Rapids, IA
pp. 659-662
Lap-Fai Leung, Hong Kong University of Science and Technology
Chi-Ying Tsui, Hong Kong University of Science and Technology
Wing-Hung Ki, Hong Kong University of Science and Technology
pp. 663-665
Session 8A - Global Routing
Lerong Cheng, University of Colorado at Boulder
Xiaoyu Song, Portland State University, OR
Guowu Yang, Portland State University, OR
Zhiwei Tang, Portland State University, OR
pp. 666-670
Zion Cien Shen, Iowa State University, Ames
Chris C. N. Chu, Iowa State University, Ames
pp. 671-676
Jingyu Xu, Tsinghua Univ., Beijing, P.R. China
Xianlong Hong, Tsinghua Univ., Beijing, P.R. China
Tong Jing, Tsinghua Univ., Beijing, P.R. China
Ling Zhang, Tsinghua Univ., Beijing, P.R. China
Jun Gu, Hong Kong Univ. of S & T, P. R. China
pp. 677-682
Jin-Tai Yan, Chung-Hua University, Hsinchu, Taiwan
Shun-Hua Lin, Chung-Hua University, Hsinchu, Taiwan
pp. 683-686
Qi Zhu, Tsinghua Univ., Beijing, P. R. China; UC Berkeley, CA
Hai Zhou, Northwestern Univ., Evanston, IL
Tong Jing, Tsinghua Univ., Beijing, P. R. China
Xianlong Hong, Tsinghua Univ., Beijing, P. R. China
Yang Yang, Tsinghua Univ., Beijing, P. R. China
pp. 687-690
Session 8B - Interconnect and ESD Extraction
Akira Tsuchiya, Kyoto University, Japan
Masanori Hashimoto, Kyoto University, Japan
Hidetoshi Onodera, Kyoto University, Japan
pp. 691-696
Tao Jiang, Motorola Inc., Austin, TX
Eric Pettus, Motorola Inc., Austin, TX
Daksh Lehther, Motorola Inc., Austin, TX
pp. 697-701
Liu Yang, Tsinghua Univ., Beijing, China
Xiaobo Guo, Tsinghua Univ., Beijing, China
Zeyi Wang, Tsinghua Univ., Beijing, China
pp. 702-706
Xiren Wang, Tsinghua Univ., Beijing, P.R. China
Deyan Liu, UCSC, Santa Cruz, CA
Wenjian Yu, Tsinghua Univ., Beijing, P.R. China
Zeyi Wang, Tsinghua Univ., Beijing, P.R. China
pp. 707-709
R. Y. Zhan, Illinois Institute of Technology, Chicago, IL
H. G. Feng, Illinois Institute of Technology, Chicago, IL
Q. Wu, Illinois Institute of Technology, Chicago, IL
X. K. Guan, Illinois Institute of Technology, Chicago, IL
G. Chen, Illinois Institute of Technology, Chicago, IL
H. L. Xie, Illinois Institute of Technology, Chicago, IL
A. Z. Wang, Illinois Institute of Technology, Chicago, IL
pp. 710-712
Session 8C - Reconfigurable Systems
Jason H. Anderson, University of Toronto, Canada
Farid N. Najm, University of Toronto, Canada
pp. 713-718
Chi-Chou Kao, National Pingtung Institute of Commerce, Pingtung, Taiwan
Yen-Tai Lai, National Cheng Kung University, Tainan, Taiwan
pp. 719-724
Ping-Hung Yuh, National Taiwan University, Taipei, Taiwan
Chia-Lin Yang, National Taiwan University, Taipei, Taiwan
Yao-Wen Chang, National Taiwan University, Taipei, Taiwan
pp. 725-730
Young-Il Kim, Korea Advanced Institute of Science and Technology, Korea
Bong-Il Park, Dynalith Systems, Korea
Jae-Gon Lee, Korea Advanced Institute of Science and Technology, Korea
Chong-Min Kyung, Korea Advanced Institute of Science and Technology, Korea
pp. 734-736
Session 8D - HW/SW Co-Design
Yoichi Yuyama, Kyoto University, Japan
Masao Aramoto, Kyoto University, Japan
Kazutoshi Kobayashi, The University of Tokyo, Japan
Hidetoshi Onodera, Kyoto University, Japan
pp. 737-742
Nozomu Togawa, The University of Kitakyushu, Japan; Waseda University, Japan
Koichi Tachikake, Waseda University, Japan
Yuichiro Miyaoka, Waseda University, Japan
Masao Yanagisawa, Waseda University, Japan
Tatsuo Ohtsuki, Waseda University, Japan
pp. 743-750
Ruibing Lu, Purdue University, West Lafayette, IN
Cheng-Kok Koh, Purdue University, West Lafayette, IN
pp. 751-755
Dongwan Shin, University of California, Irvine
Samar Abdi, University of California, Irvine
Daniel D. Gajski, University of California, Irvine
pp. 756-758
Session 9A - (Special Session) Embedded Tutorial: DFM in Nm-Process Generation
Session 9B - Advanced Interconnect Analysis
Guoyong Shi, University of Washington, Seattle
C.-J. Richard Shi, University of Washington, Seattle
pp. 774-779
Janet Wang, University of Arizona
Prashant Saxena, STL Strategy CAD Lab, Intel Corporation
Omar Hafiz, University of Arizona
Xing Wang, University of Arizona
pp. 780-785
Hao Ji, UC Santa Cruz, CA
Qingjian Yu, Cadence Design Systems, Inc., San Jose, CA
Wayne Dai, UC Santa Cruz, CA
pp. 786-791
Clement Luk, Optimal corporation
Tsung-Hao Chen, University of Wisconsin-Madison
Charlie C.-P. Chen, National Taiwan University
pp. 792-797
Session 9C - (Special Session) Panel Discussion: Future Reconfigurable Computing System
Session 9D - System-Level Architecture
Tudor Dumitras, Carnegie Mellon University, Pittsburgh, PA
Sam Kerner, Carnegie Mellon University, Pittsburgh, PA
Radu Marculescu, Carnegie Mellon University, Pittsburgh, PA
pp. 799-805
Lukai Cai, University of California, Irvine
Haobo Yu, University of California, Irvine
Daniel Gajski, University of California, Irvine
pp. 812-817
Hojun Shim, Seoul National University, Korea
Naehyuck Chang, Seoul National University, Korea
Massoud Pedram, University of Southern California
pp. 818-823
Session 10A - Embedded System Architectures
Tom Vander Aa, K.U. Leuven/ESAT, Belgium
Murali Jayapala, K.U. Leuven/ESAT, Belgium
Francisco Barat, K.U. Leuven/ESAT, Belgium
Geert Deconinck, K.U. Leuven/ESAT, Belgium
Rudy Lauwereins, IMEC vzw, Belgium
Francky Catthoor, IMEC vzw, Belgium
Henk Corporaal, TU Eindhoven, Netherlands
pp. 824-829
Hidenori Sato, Kyushu Institute of Technology, Japan
Toshinori Sato, Kyushu Institute of Technology, Japan; PRESTO, Japan
pp. 830-833
Meeyoung Cha, Korea Advanced Institute of Science and Technology, KOREA
Chun-Gi Lyuh, Korea Advanced Institute of Science and Technology, KOREA
Taewhan Kim, Korea Advanced Institute of Science and Technology, KOREA
pp. 834-837
Markus Lorenz, University of Dortmund, Germany
Peter Marwedel, University of Dortmund, Germany
Thorsten Dr?ger, Technische Universit?t Dresden, Germany
Gerhard Fettweis, Technische Universit?t Dresden, Germany
Rainer Leupers, Aachen University of Technology, Germany
pp. 838-841
Yuki Kobayashi, Osaka University, Japan
Shinsuke Kobayashi, Osaka University, Japan
Koji Okuda, Osaka University, Japan
Keishi Sakanushi, Osaka University, Japan
Yoshinori Takeuchi, Osaka University, Japan
Masaharu Imai, Osaka University, Japan
pp. 842-845
Session 10B - Crosstalk Noise Analysis
Janet Meiling Wang, University of Arizona at Tucson
Omar Hafiz, University of Arizona at Tucson
Pinhong Chen, Cadence Corperation
pp. 846-851
Soroush Abbaspour, University of Southern California
Massoud Pedram, University of Southern California
pp. 852-857
Kanak Agarwal, University of Michigan
Dennis Sylvester, University of Michigan
David Blaauw, University of Michigan
pp. 858-864
Session 10C - Expressions for Boolean Functions
R?diger Ebendt, University of Bremen, Germany
Wolfgang G?nther, Infineon Technologies, Germany
Rolf Drechsler, University of Bremen, Germany
pp. 865-870
Tsutomu Sasao, Kyushu Institute of Technology
Shinobu Nagayama, Kyushu Institute of Technology
pp. 871-874
R?diger Ebendt, University of Bremen, Germany
Wolfgang G?nther, Infineon Technologies, Germany
Rolf Drechsler, University of Bremen, Germany
pp. 875-878
Ruiming Li, The University of Texas at Dallas
Dian Zhou, The University of Texas at Dallas
Donglei Du, University of New Brunswick
pp. 879-882
Fadi A. Aloul, American University in Dubai
Arathi Ramani, University of Michigan, Ann Arbor
Igor L. Markov, University of Michigan, Ann Arbor
Karem A. Sakallah, University of Michigan, Ann Arbor
pp. 883-886
Session 10D - Semi-Custom Techniques in System Design
Fang Fang, University of Toronto, Canada
Jianwen Zhu, University of Toronto, Canada
pp. 887-892
Yiran Chen, Purdue University, West Lafayette, IN
Kaushik Roy, Purdue University, West Lafayette, IN
Cheng-Kok Koh, Purdue University, West Lafayette, IN
pp. 893-898
Fei Li, University of California, Los Angeles, CA
Lei He, University of California, Los Angeles, CA
Joseph M. Basile, Intel Corporation, Santa Clara, CA
Rakesh J. Patel, Intel Corporation, Santa Clara, CA
Hema Ramamurthy, Intel Corporation, Santa Clara, CA
pp. 899-904
Author Index (PDF)
pp. 905-911
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