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17th Conference on Advanced Research in VLSI (ARVLSI '97)
Ann Arbor, MI
September 15-September 16
ISBN: 0-8186-7913-1
Table of Contents
Session 1: High-Performance Systems, Chair: Rob Rutenbar
David Parry, Silicon Graphics Comput. Syst., Mountain View, CA, USA
pp. 12
Session 2: Clocking and Timing, Chair: Alexander Ishii
Allen E. Sjogren, Electrical Engineering Department, University of Utah
Chris J. Myers, Electrical Engineering Department, University of Utah
pp. 47
Les Hall, North Carolina State University
Mark Clements, North Carolina State University
Wentai Liu, North Carolina State University
Griff Bilbro, North Carolina State University
pp. 62
Session 3: Advanced Process and Packaging Technologies, Chair: Steve Sugiyama
Chandra Tan, The University of Tennessee, Knoxville
Donald Bouldin, The University of Tennessee, Knoxville
Peyman Dehkordi, The University of Tennessee, Knoxville
pp. 82
Session 4: VLSI Systems, Chair: Mike Upton
Todd Hinck, VLSI and Neural Net Systems Laboratory, Boston University, College of Engineering
Allyn E. Hubbard, VLSI and Neural Net Systems Laboratory, Boston University, College of Engineering
pp. 114
George Kornaros, Institute of Computer Science (ICS), Foundation for Research and Technology Hellas (FORTH)
Christoforos Kozyrakis, Institute of Computer Science (ICS), Foundation for Research and Technology Hellas (FORTH)
Panagiota Vatsolaki, Institute of Computer Science (ICS), Foundation for Research and Technology Hellas (FORTH)
Manolis Katevenis, Institute of Computer Science (ICS), Foundation for Research and Technology Hellas (FORTH)
pp. 127
David M. Dahle, University of California, Santa Cruz
Jeffrey D. Hirschberg, University of California, Santa Cruz
Kevin Karplus, University of California, Santa Cruz
Hansjoerg Keller, University of California, Santa Cruz
Eric Rice, University of California, Santa Cruz
Don Speck, University of California, Santa Cruz
Douglas H. Williams, University of California, Santa Cruz
Richard Hughey, University of California, Santa Cruz
pp. 145
Session
Special Presentations
Poster Presentations and Tours
The Media Union, Solid-State Laboratory, and Computer-Aided Engineering Network of the University of Michigan at Ann Arbor
Invited Presentation
Session 5: Asynchronous Design, Chair: William Dally
Alain J. Martin, Department of Computer Science, California Institute of Technology
Andrew Lines, Department of Computer Science, California Institute of Technology
Rajit Manohar, Department of Computer Science, California Institute of Technology
Mika Nystroem, Department of Computer Science, California Institute of Technology
Paul Penzes, Department of Computer Science, California Institute of Technology
Robert Southworth, Department of Computer Science, California Institute of Technology
Uri Cummings, Department of Computer Science, California Institute of Technology
pp. 164
Stephen P. DeWeerth, Georgia Institute of Technology Emory University
Girish N. Patel, Georgia Institute of Technology Emory University
Mario F. Simoni, Georgia Institute of Technology Emory University
David E. Schimmel, Georgia Institute of Technology Emory University
Ronald L. Calabrese, Georgia Institute of Technology Emory University
pp. 182
Session 6: Reconfigurable Logic Circuits, Chair: Jim Aylor
Nathan R. Shnidman, Electrical Engineering Department, University of California, Los Angeles
William H. Mangione-Smith, Electrical Engineering Department, University of California, Los Angeles
Miodrag Potkonjak, Computer Science Department, University of California, Los Angeles
pp. 238
Waleed M. Meleis, Northeastern University
Miriam Leeser, Northeastern University
Paul Zavracky, Northeastern University
Mankuan M. Vai, Northeastern University
pp. 256
Session 7: Radio Frequency Circuits, Chair: Bryan Ackland
Behzad Razavi, Department of Electrical Engineering, University of California, Los Angeles
pp. 270
Session 8: Advanced Architectures, Chair: Randy Bryant
John Poulton, Department of Computer Science, University of North Carolina
pp. 288
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