Steering Committee

Introduction

Dedication - W. Kahan (PDF)

pp. ix

List of referees (PDF)

pp. xii

Forword (PDF)

pp. viii

Symposium Committee (PDF)

pp. xi

Session 1: Keynote Talk

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Keynote Speaker

Session 2: Multiplication

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Data Dependent Power Use in Multipliers (Abstract)

Colin D. Walter, Comodo Research Laboratory

David Samyde, FemtoNano

pp. 4-12

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Correctly Rounded Multiplication by Arbitrary Precision Constants (Abstract)

Nicolas Brisebarre, Universit? Jean Monnet

Jean-Michel Muller, CNRS, Laboratoire LIP (CNRS/ENS Lyon/INRIA/Universit? Lyon 1)

pp. 13-20

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Decimal Multiplication with Efficient Partial Product Generation (Abstract)

Mark A. Erle, International Business Machines

Eric M. Schwarz, International Business Machines

Michael J. Schulte, University of Wisconsin - Madison

pp. 21-28

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Long Number Bit-Serial Squarers (Abstract)

E. Chaniotakis, National Technical University of Athens

P. Kalivas, National Technical University of Athens

K. Z. Pekmestzi, National Technical University of Athens

pp. 29-36

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Session 3: Round Table

Pain versus Gain in the Hardware Design of FPUs and Supercomputers (PDF)

Roger Golliver, Intel Corporation

Silvia Mueller, IBM Corp.

Stuart Oberman, NVIDIA

Martin Schmookler, IBM Corp.

Debjit DasSarma, AMD

Andrew Beaumont-Smith, P.A. Semi

pp. 39

Session 4: Applications

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Floating-Point Fused Multiply-Add: Reduced Latency for Floating-Point Addition (Abstract)

Javier D. Bruguera, University of Santiago de Compostela

Tomás Lang, University of California at Irvine

pp. 42-51

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Some Functions Computable with a Fused-Mac (Abstract)

Sylvie Boldo, Laboratoire LIP (CNRS/ENS Lyon/Inria/Université Lyon 1)

Jean-Michel Muller, Laboratoire LIP (CNRS/ENS Lyon/Inria/Université Lyon 1)

pp. 52-58

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The Vector Floating-Point Unit in a Synergistic Processor Element of a CELL Processor (Abstract)

Silvia M. Mueller, IBM Boeblingen

Christian Jacobi, IBM Boeblingen

Hwa-Joon Oh, IBM Austin

Kevin D. Tran, IBM Austin

Scott R. Cottier, IBM Austin

Brad W. Michael, IBM Austin

Hiroo Nishikawa, IBM Japan Industrial Solution Co.

Yonetaro Totsuka, Sony Computer Entertainment of America

Tatsuya Namatame, Toshiba Corporation

Naoka Yano, Toshiba Corporation

Takashi Machida, Toshiba Corporation

Sang H. Dhong, IBM Austin

pp. 59-67

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New Results on the Distance between a Segment and Z?. Application to the Exact Rounding (Abstract)

Vincent Lefèvre, LORIA/INRIA Lorraine

pp. 68-75

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Solving Constraints on the Invisible Bits of the Intermediate Result for Floating-Point Verification (Abstract)

Merav Aharoni, IBM Research Lab in Haifa

Sigal Asaf, IBM Research Lab in Haifa

Ron Maharik, IBM Research Lab in Haifa

Ilan Nehama, IBM Research Lab in Haifa

Ilya Nikulshin, IBM Research Lab in Haifa

Abraham Ziv, IBM Research Lab in Haifa

pp. 76-83

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Session 5: Panel

Arithmetic Interactions: From Hardware to Applications (PDF)

David Hough, Sun Microsystems

Bill Hay, IBM

Jeff Kidder, Intel

Jason Riedy, University of California at Berkeley

Guy Steele, Sun Microsystems

Jim Thomas, Hewlett-Packard

pp. 87

Session 6: Addition

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Parallel Prefix Adder Design with Matrix Representation (Abstract)

Youngmoon Choi, Sun Microsystems, Inc.

Earl E. Swartzlander. Jr., University of Texas at Austin

pp. 90-98

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High-Radix Implementation of IEEE Floating-Point Addition (Abstract)

Peter-Michael Seidel, Southern Methodist University

pp. 99-106

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Efficient Mapping of Addition Recurrence Algorithms in CMOS (Abstract)

Bart R. Zeydel, University of California at Davis

Theo T. J. H. Kluter, EPFL

Vojin G. Oklobdzija, University of California at Davis

pp. 107-113

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Synthesis of Saturating Counters Using Traditional and Non-Traditional Basic Counters (Abstract)

Zhaojun Wo, University of Massachusetts at Amherst

Israel Koren, University of Massachusetts at Amherst

pp. 114-121

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Session 7: Division

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Division by Constant for the ST100 DSP Microprocessor (Abstract)

Jean-Michel Muller, CNRS-ENS Lyon-INRIA-UCBL

Arnaud Tisserand, CNRS-ENS Lyon-INRIA-UCBL

Benoît de Dinechin, STMicroelectronics

Christophe Monat, STMicroelectronics

pp. 124-130

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N-Bit Unsigned Division via N-Bit Multiply-Add (Abstract)

Arch D. Robison, Intel Corporation

pp. 131-139

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A Hardware Algorithm for Integer Division (Abstract)

Naofumi Takagi, Nagoya University

Shunsuke Kadowaki, Nagoya University

Kazuyoshi Takagi, Nagoya University

pp. 140-146

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Low Latency Digit-Recurrence Reciprocal and Square-Root Reciprocal Algorithm and Architecture (Abstract)

Elisardo Antelo, University of Santiago

Tomás Lang, University of California at Irvine

Paolo Montuschi, Politechnico di Torino

Alberto Nannarelli, Technical University of Denmark

pp. 147-154

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Session 8: Cryptography and Galois Fields

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Table Lookup Structures for Multiplicative Inverses Modulo 2^k (Abstract)

David W. Matula, Southern Methodist University

Alex Fit-Florea, Southern Methodist University

Mitchell Aaron Thornton, Southern Methodist University

pp. 156-163

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Parallel Montgomery Multiplication in GF (2^k) Using Trinomial Residue Arithmetic (Abstract)

Jean-Claude Bajard, LIRMM, CNRS UMR

Laurent Imbert, LIRMM, CNRS UMR and University of Calgary

Graham A. Jullien, University of Calgary

pp. 164-171

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An Improved Unified Scalable Radix-2 Montgomery Multiplier (Abstract)

David Harris, Harvey Mudd College

Ram Krishnamurthy, Intel Circuits Research Laboratory

Mark Anders, Intel Circuits Research Laboratory

Sanu Mathew, Intel Circuits Research Laboratory

Steven Hsu, Intel Circuits Research Laboratory

pp. 172-178

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Fast Modular Reduction for Large Wordlengths via One Linear and One Cyclic Convolution (Abstract)

Dhananjay S. Phatak, University of Maryland at Baltimore County

Tom Goff, University of Maryland at Baltimore County

pp. 179-186

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Session 9: Number Systems

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Guaranteed Proofs Using Interval Arithmetic (Abstract)

Marc Daumas, CNRS-ENS Lyon-INRIA

Guillaume Melquiond, CNRS-ENS Lyon-INRIA

César Muñoz, National Institute of Aerospace

pp. 188-195

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The Residue Logarithmic Number System: Theory and Implementation (Abstract)

Mark G. Arnold, Lehigh University

pp. 196-205

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Arithmetic Operations in the Polynomial Modular Number System (Abstract)

Jean-Claude Bajard, CNRS LIRMM UMR

Laurent Imbert, University of Calgary

Thomas Plantard, CNRS LIRMM UMR

pp. 206-213

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Error-Free Computation of 8x8 2-D DCT and IDCT Using Two-Dimensional Algebraic Integer Quantization (Abstract)

Khan Wahid, University of Calgary

Vassil Dimitrov, University of Calgary

Graham Jullien, University of Calgary

pp. 214-221

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Quasi-Pipelined Hash Circuits (Abstract)

Marco Macchetti, Politecnico di Milano

Luigi Dadda, ALaRI-USI and Politecnico di Milano

pp. 222-229

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Session 10: Function Evaluation and Table Methods, Part 1

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Efficient Function Approximation Using Truncated Multipliers and Squarers (Abstract)

E. George Walters III, Lehigh University

Michael J. Schulte, University of Wisconsin-Madison

pp. 232-239

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Single Precision Reciprocals by Multipartite Table Lookup (Abstract)

Peter Kornerup, University of Southern Denmark

David W. Matula, Southern Methodist University

pp. 240-248

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A Linear-System Operator Based Scheme for Evaluation of Multinomials (Abstract)

Pavan Adharapurapu, University of California at Los Angeles

Miloš Ercegovac, University of California at Los Angeles

pp. 249-256

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Gal's Accurate Tables Method Revisited (Abstract)

Damien Stehlé, UHP/LORIA

Paul Zimmermann, INRIA Lorraine/LORIA

pp. 257-264

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Session 11: Function Evaluation and Table Methods, Part 2

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A Fast-Start Method for Computing the Inverse Tangent (Abstract)

Peter Markstein, Hewlett-Packard Laboratories

pp. 266-271

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A High-Performance Area-Efficient Multifunction Interpolator (Abstract)

Stuart F. Oberman, NVIDIA Corporation

Michael Y. Siu, NVIDIA Corporation

pp. 272-279

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Low Latency Pipelined Circular CORDIC (Abstract)

Elisardo Antelo, University of Santiago

Julio Villalba, University of Málaga

pp. 280-287

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Towards the Post-Ultimate libm (Abstract)

Florent de Dinechin, LIP, ÉNS de Lyon

Alexey V. Ershov, Intel Corporation

Nicolas Gast, École Normale Supérieure

pp. 288-295

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Author Index

Author Index (PDF)

pp. 297-298