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15th IEEE Symposium on Computer Arithmetic (ARITH-15 '01)
Unrestricted Faithful Rounding is Good Enough for Some LNS Applications
Vail, Colorado
June 11-June 13
ISBN: 0-7695-1150-3
Abstract: We propose relaxing the restricted form of faithful rounding used in prior 32-bit Logarithmic Number System (LNS) implementations. Unrestricted faithful rounding yields a three- to six-fold savings in VLSI ROM size (or four- to six- fold savings in F GPA table size) with only modest increase in error. This can be acceptable for the DSP and multimedia applications in which the non-standard LNS is a candidate for adoption. Such applications are cost sensitive, and the tremendous cost reduction of the LNS model proposed here should argue very favourably for its adoption.
Citation:
Mark G. Arnold, Colin Walter, "Unrestricted Faithful Rounding is Good Enough for Some LNS Applications," arith, pp.0237, 15th IEEE Symposium on Computer Arithmetic (ARITH-15 '01), 2001
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