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Exploiting Redundancy to Speed Up Parallel Systems
August 1993 (vol. 1 no. 3)
pp. 51-60
ASCII Text
x 
 
I?Ling Yen, Ernst L. Leiss, Farokh B. Bastani, "Exploiting Redundancy to Speed Up Parallel Systems," IEEE Concurrency, vol. 1, no. 3, pp. 51-60, August, 1993.
 
 
BibTex
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@article{ 10.1109/88.242445,
author = {I?Ling Yen and Ernst L. Leiss and Farokh B. Bastani},
title = {Exploiting Redundancy to Speed Up Parallel Systems},
journal ={IEEE Concurrency},
volume = {1},
number = {3},
issn = {1063-6552},
year = {1993},
pages = {51-60},
doi = {http://doi.ieeecomputersociety.org/10.1109/88.242445},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Concurrency
TI - Exploiting Redundancy to Speed Up Parallel Systems
IS - 3
SN - 1063-6552
SP51
EP60
EPD - 51-60
A1 - I?Ling Yen,
A1 - Ernst L. Leiss,
A1 - Farokh B. Bastani,
PY - 1993
VL - 1
JA - IEEE Concurrency
ER -
 
Repetitive fault tolerance takes advantage of redundant processors to offer peak performance during normal execution, and graceful performance degradation when processors fail. As long as one processor is working, the computation can continue. The authors use the underlying principle of inherent fault tolerance, turning redundancy into computation power, to design a model of repetitive fault tolerance that is suitable for dataflow computations. When no processors fail, they all work in parallel to achieve performance almost equal to that of the parallel program without fault tolerance. If processors do fail, the program can still derive the correct result as long as at least one processor is working; failures only slow the computation speed. Repetitive fault tolerance also provides a systematic way to derive fault-tolerant programs.
Citation:
I?Ling Yen, Ernst L. Leiss, Farokh B. Bastani, "Exploiting Redundancy to Speed Up Parallel Systems," IEEE Concurrency, vol. 1, no. 3, pp. 51-60, Aug. 1993, doi:10.1109/88.242445
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