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Silicon Odometers: Compact In-situ Aging Sensors for Robust System Design
PrePrint
ISSN: 0272-1732
Xiaofei Wang, University of Minnesota, Minneapolis
John Keane, Intel Corporation, Hillsboro
Tony Tae-Hyoung Kim, Nanyang Technological University, Singapore
Pulkit Jain, Intel Corporation, Hillsboro
Qianying Tang, University of Minnesota, Minneapolis
Chris H. Kim, University of Minnesota, Minneapolis
Circuit reliability issues such as Bias Temperature Instability (BTI), Hot Carrier Injection (HCI), Time Dependent Dielectric Breakdown (TDDB) Electromigration (EM), and Random Telegraph Noise (RTN) have become a growing concern with technology scaling. Precise measurements of circuit degradation induced by these reliability mechanisms are a key aspect of robust design. This article will review a number of unique test chip designs pursued by our group that demonstrate the benefits of utilizing on-chip logic and a simple test interface to automate circuit aging experiments. This new class of compact on-chip sensors can reveal important aspects of circuit aging that would otherwise be impossible to measure, can facilitate the collection of reliability data from systems deployed in the field, and can eventually lead us down the path to real-time aging compensation in future processors.
Citation:
Xiaofei Wang, John Keane, Tony Tae-Hyoung Kim, Pulkit Jain, Qianying Tang, Chris H. Kim, "Silicon Odometers: Compact In-situ Aging Sensors for Robust System Design," IEEE Micro, 04 Feb. 2014. IEEE computer Society Digital Library. IEEE Computer Society, <http://doi.ieeecomputersociety.org/10.1109/MM.2014.2>
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