Issue No.03 - May-June (2013 vol.33)
Mahdi Nazm Bojnordi , University of Rochester
Engin Ipek , University of Rochester
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MM.2013.29
Modern memory controllers employ sophisticated address mapping, command scheduling, and power management optimizations to alleviate the adverse effects of DRAM timing and resource constraints on system performance. A promising way of improving the versatility and efficiency of these controllers is to make them programmable. Unfortunately, the stringent latency and throughput requirements of modern DDRx (double data rate memory interface technology) devices have rendered such programmability largely impractical, confining DDRx controllers to fixed-function hardware. Pardis is the first programmable memory controller that can meet these challenges and thus satisfy the performance requirements of a high-speed DDRx interface.
Computer architecture, Memory management, Computer programs, Programming, Computer interfaces, double data rate memory interface technology, programmability, memory controllers, DDRx, Pardis
Mahdi Nazm Bojnordi, Engin Ipek, "Programmable DDRx Controllers", IEEE Micro, vol.33, no. 3, pp. 106-115, May-June 2013, doi:10.1109/MM.2013.29