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Low-Power, Real-Time Object-Recognition Processors for Mobile Vision Systems
Nov.-Dec. 2012 (vol. 32 no. 6)
pp. 38-50
Jinwook Oh, Korea Advanced Institute of Science and Technology
Gyeonghoon Kim, Korea Advanced Institute of Science and Technology
Injoon Hong, Korea Advanced Institute of Science and Technology
Junyoung Park, Korea Advanced Institute of Science and Technology
Seungjin Lee, Korea Advanced Institute of Science and Technology
Joo-Young Kim, Korea Advanced Institute of Science and Technology
Jeong-Ho Woo, Korea Advanced Institute of Science and Technology
Hoi-Jun Yoo, Korea Advanced Institute of Science and Technology
A new low-power object-recognition processor achieves real-time robust recognition, satisfying modern mobile vision systems' requirements. The authors introduce an attention-based object-recognition algorithm for energy efficiency, a heterogeneous multicore architecture for data- and thread-level parallelism, and a network on a chip for high on-chip bandwidth. The fabricated chip achieves 30 frames/second throughput and an average 320 mW power consumption on test 720p video sequences, yielding 640 GOPS/W and 10.5 nJ/pixel energy efficiency.
Index Terms:
Decision support systems,Robustness,Object recognition,Multicore processing,Network-on-a-chip,Low power electronics,SIFT,object recognition,attention,attention-based object recognition,network-on-chip,multicore processor,heterogeneous multicore,object-recognition pipeline,scale invariant feature transform
Citation:
Jinwook Oh, Gyeonghoon Kim, Injoon Hong, Junyoung Park, Seungjin Lee, Joo-Young Kim, Jeong-Ho Woo, Hoi-Jun Yoo, "Low-Power, Real-Time Object-Recognition Processors for Mobile Vision Systems," IEEE Micro, vol. 32, no. 6, pp. 38-50, Nov.-Dec. 2012, doi:10.1109/MM.2012.90
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