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Low-Power, Real-Time Object-Recognition Processors for Mobile Vision Systems
Nov.-Dec. 2012 (vol. 32 no. 6)
pp. 38-50
| ASCII Text | x | ||
| Jinwook Oh, Gyeonghoon Kim, Injoon Hong, Junyoung Park, Seungjin Lee, Joo-Young Kim, Jeong-Ho Woo, Hoi-Jun Yoo, "Low-Power, Real-Time Object-Recognition Processors for Mobile Vision Systems," IEEE Micro, vol. 32, no. 6, pp. 38-50, Nov.-Dec., 2012. | |||
| BibTex | x | ||
| @article{ 10.1109/MM.2012.90, author = {Jinwook Oh and Gyeonghoon Kim and Injoon Hong and Junyoung Park and Seungjin Lee and Joo-Young Kim and Jeong-Ho Woo and Hoi-Jun Yoo}, title = {Low-Power, Real-Time Object-Recognition Processors for Mobile Vision Systems}, journal ={IEEE Micro}, volume = {32}, number = {6}, issn = {0272-1732}, year = {2012}, pages = {38-50}, doi = {http://doi.ieeecomputersociety.org/10.1109/MM.2012.90}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - IEEE Micro TI - Low-Power, Real-Time Object-Recognition Processors for Mobile Vision Systems IS - 6 SN - 0272-1732 SP38 EP50 EPD - 38-50 A1 - Jinwook Oh, A1 - Gyeonghoon Kim, A1 - Injoon Hong, A1 - Junyoung Park, A1 - Seungjin Lee, A1 - Joo-Young Kim, A1 - Jeong-Ho Woo, A1 - Hoi-Jun Yoo, PY - 2012 KW - Decision support systems KW - Robustness KW - Object recognition KW - Multicore processing KW - Network-on-a-chip KW - Low power electronics KW - SIFT KW - object recognition KW - attention KW - attention-based object recognition KW - network-on-chip KW - multicore processor KW - heterogeneous multicore KW - object-recognition pipeline KW - scale invariant feature transform VL - 32 JA - IEEE Micro ER - | |||
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MM.2012.90
A new low-power object-recognition processor achieves real-time robust recognition, satisfying modern mobile vision systems' requirements. The authors introduce an attention-based object-recognition algorithm for energy efficiency, a heterogeneous multicore architecture for data- and thread-level parallelism, and a network on a chip for high on-chip bandwidth. The fabricated chip achieves 30 frames/second throughput and an average 320 mW power consumption on test 720p video sequences, yielding 640 GOPS/W and 10.5 nJ/pixel energy efficiency.
Index Terms:
Decision support systems,Robustness,Object recognition,Multicore processing,Network-on-a-chip,Low power electronics,SIFT,object recognition,attention,attention-based object recognition,network-on-chip,multicore processor,heterogeneous multicore,object-recognition pipeline,scale invariant feature transform
Citation:
Jinwook Oh, Gyeonghoon Kim, Injoon Hong, Junyoung Park, Seungjin Lee, Joo-Young Kim, Jeong-Ho Woo, Hoi-Jun Yoo, "Low-Power, Real-Time Object-Recognition Processors for Mobile Vision Systems," IEEE Micro, vol. 32, no. 6, pp. 38-50, Nov.-Dec. 2012, doi:10.1109/MM.2012.90
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