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Redefining the Role of the CPU in the Era of CPU-GPU Integration
Nov.-Dec. 2012 (vol. 32 no. 6)
pp. 4-16
ASCII Text
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Manish Arora, Siddhartha Nath, Subhra Mazumdar, Scott B. Baden, Dean M. Tullsen, "Redefining the Role of the CPU in the Era of CPU-GPU Integration," IEEE Micro, vol. 32, no. 6, pp. 4-16, Nov.-Dec., 2012.
 
 
BibTex
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@article{ 10.1109/MM.2012.57,
author = {Manish Arora and Siddhartha Nath and Subhra Mazumdar and Scott B. Baden and Dean M. Tullsen},
title = {Redefining the Role of the CPU in the Era of CPU-GPU Integration},
journal ={IEEE Micro},
volume = {32},
number = {6},
issn = {0272-1732},
year = {2012},
pages = {4-16},
doi = {http://doi.ieeecomputersociety.org/10.1109/MM.2012.57},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Micro
TI - Redefining the Role of the CPU in the Era of CPU-GPU Integration
IS - 6
SN - 0272-1732
SP4
EP16
EPD - 4-16
A1 - Manish Arora,
A1 - Siddhartha Nath,
A1 - Subhra Mazumdar,
A1 - Scott B. Baden,
A1 - Dean M. Tullsen,
PY - 2012
KW - Graphics processing unit
KW - Benchmark testing
KW - Central Processing Unit
KW - Parallel processing
KW - Hidden Markov models
KW - Computational modeling
KW - CPU architecture
KW - CPU-GPU systems
KW - heterogeneous designs
VL - 32
JA - IEEE Micro
ER -
 
Manish Arora, University of California, San Diego
Siddhartha Nath, University of California, San Diego
Subhra Mazumdar, University of California, San Diego
Scott B. Baden, University of California, San Diego
Dean M. Tullsen, University of California, San Diego
In an integrated CPU-GPU system, the CPU executes code that is profoundly different than in past CPU-only environments. This new code's characteristics should drive future CPU design and architecture. Post-GPU code has lower instruction-level parallelism, more difficult branch prediction, and loads and stores that are significantly harder to predict. Post-GPU code exhibits much smaller gains from the availability of multiple cores, owing to reduced thread-level parallelism.
Index Terms:
Graphics processing unit,Benchmark testing,Central Processing Unit,Parallel processing,Hidden Markov models,Computational modeling,CPU architecture,CPU-GPU systems,heterogeneous designs
Citation:
Manish Arora, Siddhartha Nath, Subhra Mazumdar, Scott B. Baden, Dean M. Tullsen, "Redefining the Role of the CPU in the Era of CPU-GPU Integration," IEEE Micro, vol. 32, no. 6, pp. 4-16, Nov.-Dec. 2012, doi:10.1109/MM.2012.57
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