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| Erik R. Altman, "Which Way Microarchitecture?," IEEE Micro, vol. 32, no. 6, pp. 2, Nov.-Dec., 2012. | |||
| BibTex | x | ||
| @article{ 10.1109/MM.2012.102, author = {Erik R. Altman}, title = {Which Way Microarchitecture?}, journal ={IEEE Micro}, volume = {32}, number = {6}, issn = {0272-1732}, year = {2012}, pages = {2}, doi = {http://doi.ieeecomputersociety.org/10.1109/MM.2012.102}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - IEEE Micro TI - Which Way Microarchitecture? IS - 6 SN - 0272-1732 SP EP EPD - 2 A1 - Erik R. Altman, PY - 2012 KW - GPU KW - memory KW - microarchitecture KW - superscalar KW - caches KW - energy KW - power KW - parallelization KW - concurrency KW - multicore KW - reliability KW - security KW - debugging KW - simulation KW - test KW - programming models KW - reconfigurability KW - virtualization KW - big data KW - data centers KW - robots KW - vision KW - image recognition VL - 32 JA - IEEE Micro ER - | |||
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MM.2012.102
This column discusses topics of interest to the microarchitecture community, judging by Micro conference paper session topics and IEEE Micro issue themes. It also previews the two Cool Chips articles in the issue and the cover article on CPU-GPU integration.
Index Terms:
GPU,memory,microarchitecture,superscalar,caches,energy,power,parallelization,concurrency,multicore,reliability,security,debugging,simulation,test,programming models,reconfigurability,virtualization,big data,data centers,robots,vision,image recognition
Citation:
Erik R. Altman, "Which Way Microarchitecture?," IEEE Micro, vol. 32, no. 6, pp. 2, Nov.-Dec. 2012, doi:10.1109/MM.2012.102
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