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Issue No.05 - Sept.-Oct. (2012 vol.32)
pp: 26-36
David Burgess , Freescale
Edmund Gieske , Freescale
James Holt , Freescale
Thomas Hoy , Freescale
Gary Whisenhunt , Freescale
ABSTRACT
Freescale's e6500 targets highly efficient scalable embedded processing. It incorporates many architectural and microarchitectural performance innovations, from advanced virtualization technologies and judicious hardware thread resource allocation to coherency and interconnect transaction avoidance techniques, including decorated storage operations, lightweight ordering barriers, and cache stashing. Power-efficiency techniques, including cascading system power management and automatic execution unit powering, are coupled with a power-optimized physical design.
INDEX TERMS
Embedded systems, Instruction sets, Program processors, Microarchitecture, Scalability, Technological innovation, System-on-a-chip, e6500, processor, low-power, multithreading, embedded, Freescale
CITATION
David Burgess, Edmund Gieske, James Holt, Thomas Hoy, Gary Whisenhunt, "e6500: Freescale's Low-Power, High-Performance Multithreaded Embedded Processor", IEEE Micro, vol.32, no. 5, pp. 26-36, Sept.-Oct. 2012, doi:10.1109/MM.2012.55
REFERENCES
1. W.Y. Lee, "Energy-Efficient Scheduling of Periodic Real-Time Tasks on Lightly Loaded Multicore Processors," IEEE Trans. Parallel and Distributed Systems, vol. 23, no. 3, 2012, pp. 530-537.
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